JPH02303003A - Non-linearity voltage resistance element - Google Patents

Non-linearity voltage resistance element

Info

Publication number
JPH02303003A
JPH02303003A JP1123671A JP12367189A JPH02303003A JP H02303003 A JPH02303003 A JP H02303003A JP 1123671 A JP1123671 A JP 1123671A JP 12367189 A JP12367189 A JP 12367189A JP H02303003 A JPH02303003 A JP H02303003A
Authority
JP
Japan
Prior art keywords
layer
zno
electrode
oxide
linearity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1123671A
Other languages
Japanese (ja)
Inventor
Yoshihiko Yano
義彦 矢野
Yukihiko Shirakawa
幸彦 白川
Hisao Morooka
久雄 師岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Corp
Original Assignee
TDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Corp filed Critical TDK Corp
Priority to JP1123671A priority Critical patent/JPH02303003A/en
Publication of JPH02303003A publication Critical patent/JPH02303003A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To increase the non-linearity index alpha by a method wherein the title non-linearity voltage resistance element is provided with a substrate an electrode layer formed thereon, a composite layer comprising a ZnO layer held between two metallic oxide layers on the electrode layer and another electrode layer on the topmost part of the composite layer. CONSTITUTION:A lower electrode 3 is formed by evaporating nickel on a glassy substrate 1 and then a metallic oxide layer 4 is formed on the electrode 3 using a sintered body comprising a praseodymium oxide and a cobalt oxide as a target. Furthermore, a ZnO layer 5 in almost 1mum thick is formed using a ZnO sintered body as another target; next, another metallic oxide layer 6 is formed using the said sintered body comprising the praseodymium oxide and the cobalt oxide as the other target; next an upper electrode 7 is formed by evaporating nickel. Through these procedures, the flatness of the ZnO layer 5 can be enhanced by forming the layer 5 after forming the metallic oxide layer 4, consequently the unfavorable effect on the non-linearity in the current voltage characteristics can be averted thereby enabling the non-linearity index alpha to exceed 30.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は、リレー接点の保護、IC,LSI等の半導体
素子の静電気に対する保護、カラーテレビブラウン管回
路の放電吸収などの手段として利用されている電圧非直
線性抵抗素子の改良に関する。
[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention is a means for protecting relay contacts, protecting semiconductor elements such as ICs and LSIs against static electricity, and absorbing discharges in color TV cathode ray tube circuits. This invention relates to improvements in voltage nonlinear resistance elements used as such.

(従来の技術) 従来、電圧非直線性抵抗素子(以下バリスタともいう)
としては、第3図に示すようにガラス又はセラミックの
基板12上にAu、AJ等を真空蒸着して下部電極(電
極層)13とし、この下部電極13上にスパッタリング
などによりZn0層14を形成し、このZn0層14上
にスパッタリングなどにより酸化プラセオジム(Pr2
03)及び酸化コバルト(CO203)から成る金属酸
化物層15を形成し、さらにこの金属酸化物層15上に
スパッタリングなどによりZn0層16を形成し、続い
てこのZn0層16上にAu。
(Conventional technology) Conventionally, voltage nonlinear resistance elements (hereinafter also referred to as varistors)
As shown in FIG. 3, Au, AJ, etc. are vacuum-deposited on a glass or ceramic substrate 12 to form a lower electrode (electrode layer) 13, and a Zn0 layer 14 is formed on this lower electrode 13 by sputtering or the like. Then, praseodymium oxide (Pr2
03) and cobalt oxide (CO203), a Zn0 layer 16 is formed on this metal oxide layer 15 by sputtering, etc., and then Au is formed on this Zn0 layer 16.

A1などを蒸着して上部電極(電極層)17が形成され
て成るバリスタ11が知られている。
A varistor 11 is known in which an upper electrode (electrode layer) 17 is formed by vapor-depositing A1 or the like.

また、上記構成のバリスタ11は、前記ZnO層14.
16と前記金属酸化物層15の界面に形成された電位障
壁14a、16aによりその特性(バリスタ電圧)が決
定される。
Further, the varistor 11 having the above structure has the ZnO layer 14.
The characteristics (varistor voltage) are determined by the potential barriers 14a and 16a formed at the interface between the metal oxide layer 16 and the metal oxide layer 15.

上記構成のバリスタ11では、前記上部電極17が下部
電極13に対して正になるように電圧を加えると、電位
障壁16aは逆方向にバイアスされ、下部電極13が前
記上部電極17に対して正になるように電圧を加えると
、電位障壁14aは逆方向にバイアスされ、それぞれあ
る一定の電圧まで電流が流れず、ある電圧値から急激に
電流の流れ出す対称型電圧非直線性(非直線指数αが1
0前後)を示すことが知られている。
In the varistor 11 having the above configuration, when a voltage is applied so that the upper electrode 17 becomes positive with respect to the lower electrode 13, the potential barrier 16a is biased in the opposite direction, and the lower electrode 13 becomes positive with respect to the upper electrode 17. When a voltage is applied so that is 1
0).

(発明が解決しようとする課題) 上述したようなバリスタ(電圧非直線性抵抗素子)では
、下部電極を形成した後、前記下部電極上にスパッタリ
ングなどによりZnO層を形成している。
(Problems to be Solved by the Invention) In the varistor (voltage nonlinear resistance element) as described above, after forming a lower electrode, a ZnO layer is formed on the lower electrode by sputtering or the like.

しかしながら、第4図に示すようにZnOはC軸(基板
の垂直方向)に優位配向し易い性質を有するため、結晶
性の金属電極上に成膜するとZnO層の界面に凹凸が生
じこの高低差H1は最高1000人にもなる。この高低
差によりZnO層の平坦性が低下し電流電圧特性におけ
る非直線性に悪影響を与えることになり、非直線指数α
を大きくできず性能向上が図れないないという問題点を
生じてしまう。
However, as shown in Figure 4, ZnO has the property of being predominantly oriented along the C-axis (perpendicular to the substrate), so when a film is formed on a crystalline metal electrode, unevenness occurs at the interface of the ZnO layer and this height difference occurs. H1 can hold up to 1000 people. This height difference reduces the flatness of the ZnO layer and adversely affects the nonlinearity in current-voltage characteristics, resulting in a nonlinearity index α
This results in the problem that the performance cannot be improved because it cannot be made larger.

また、上部電極にエツチングにより導電パターンを形成
する場合、ZnOが両性酸化物であることにより酸、ア
ルカリ双方に可溶性であり前記上部電極の除去部分と共
に一部溶解してしまい前記同様に電流電圧特性における
非直線性に悪影響を与えるため容易に導電パターンを形
成できないという問題点も生じる。
In addition, when forming a conductive pattern on the upper electrode by etching, ZnO is an amphoteric oxide and is soluble in both acid and alkali, so it partially dissolves together with the removed portion of the upper electrode, resulting in the same current-voltage characteristics as above. Another problem arises in that a conductive pattern cannot be easily formed because it adversely affects the nonlinearity of the conductive pattern.

本発明は、上記問題点を解決しZnO層の平坦性が向上
でき、電流電圧特性における非直線性に悪影響を与えず
、非直線指数αを大きくでき、かつエツチングにより上
部電極に容易に導電パターンを形成できる電圧非直線性
抵抗素子を提供することを目的とする。
The present invention solves the above problems, improves the flatness of the ZnO layer, does not adversely affect the nonlinearity in current-voltage characteristics, increases the nonlinearity index α, and allows a conductive pattern to be easily formed on the upper electrode by etching. An object of the present invention is to provide a voltage nonlinear resistance element that can form a voltage nonlinear resistance element.

[発明の構成コ (課題を解決するための手段) 本発明は、基材と、前記基材上に形成された電極層と、
前記電極層上に金属酸化物層に挟まれたZnO層とによ
り形成された複合層を少なくとも一つ有し、前記複合層
の最上部に電極層を有することを特徴とするものである
[Configuration of the Invention (Means for Solving the Problems) The present invention provides a base material, an electrode layer formed on the base material,
It is characterized in that it has at least one composite layer formed of a ZnO layer sandwiched between metal oxide layers on the electrode layer, and has an electrode layer on the top of the composite layer.

(作 用) 上記の様に、基材上に形成された電極層(下部電極)上
に金属酸化物層に挟まれたZnO層が形成された複合層
を有することによりZnO層の平坦性が向上でき、また
エツチングにより上部電極に容易に導電パターンを形成
できる。
(Function) As described above, by having a composite layer in which a ZnO layer sandwiched between metal oxide layers is formed on an electrode layer (lower electrode) formed on a base material, the flatness of the ZnO layer is improved. Furthermore, a conductive pattern can be easily formed on the upper electrode by etching.

(実施例) 本発明による電圧非直線性抵抗素子(以下バリスタとい
う)の一実施例を図面を参照して説明する。
(Example) An example of a voltage nonlinear resistance element (hereinafter referred to as a varistor) according to the present invention will be described with reference to the drawings.

第1図は、本発明によるバリスタの断面図である。FIG. 1 is a cross-sectional view of a varistor according to the invention.

図中に示すバリスタ1は、例えばガラス、アルミナ(絶
縁性基板)やアルミ、亜鉛等く導電性基板)等から成る
基板(基材)2(実施例中ではガラス基板を示す)と、
例えばニッケル(Ni)により形成された下部電極(電
極層)3と、例えば酸化プラセオジム(Pr203)及
び酸化コバル1’ (CO203)により構成されてい
る金属酸化物層4と、ZnOを主成分とするZn0層4
と、更に前記同様の例えば酸化プラセオジム(Pr20
i)及び酸化コバルト(CO203)により構成されて
いる金属酸化物層6と、例えばニッケル(Ni)により
形成された上部電極(電極層)7により構成されている
。尚、本発明でいう複合層とは前記金属酸化物層4、Z
n0層5、金属酸化物層6により構成されている。また
、図中5a、5bは前記金属酸化物層4と前記ZnO層
5の界面に形成された電位障壁である。
The varistor 1 shown in the figure includes a substrate (base material) 2 (a glass substrate is shown in the examples) made of, for example, glass, alumina (an insulating substrate), a conductive substrate such as aluminum, zinc, etc.
A lower electrode (electrode layer) 3 made of, for example, nickel (Ni), a metal oxide layer 4 made of, for example, praseodymium oxide (Pr203) and cobal oxide 1' (CO203), and a metal oxide layer 4 mainly made of ZnO. Zn0 layer 4
and further the same as above, for example, praseodymium oxide (Pr20
i) and a metal oxide layer 6 made of cobalt oxide (CO203), and an upper electrode (electrode layer) 7 made of, for example, nickel (Ni). Incidentally, the composite layer referred to in the present invention refers to the metal oxide layer 4, Z
It is composed of an n0 layer 5 and a metal oxide layer 6. Further, 5a and 5b in the figure are potential barriers formed at the interface between the metal oxide layer 4 and the ZnO layer 5.

次に、前記バリスタ1の製造方法について説明する。Next, a method for manufacturing the varistor 1 will be explained.

まず、ガラス基板2上にニッケル(Ni)を蒸着により
厚さ0.5μmに形成して下部電極3とし、この下部電
極3に酸化プラセオジム(P r203 )及び酸化コ
バルト(CO2o、’)から成る焼結体をターゲットに
して前記ガラス基板2の温度250℃、スパッタアルゴ
ン(Ar)雰囲気中、投入電力120Wにおいてスパッ
タリングにて金属酸化物層4を形成し、ZnO焼結体を
ターゲットとし上記同様に、Zn0層5を略1μm形成
し、次に、酸化プラセオジム(pr2o3)及び酸化コ
バル1’ (CO203’)から成る焼結体をターゲッ
トにして上記同様に金属酸化物層6を形成し、次にニッ
ケル(Ni)を蒸着にて0.5μm形成して上部電極7
とし前記バリスタ1を得る。
First, nickel (Ni) is formed on the glass substrate 2 to a thickness of 0.5 μm by vapor deposition to form the lower electrode 3, and this lower electrode 3 is coated with a sintered material made of praseodymium oxide (Pr203) and cobalt oxide (CO2o,'). A metal oxide layer 4 is formed by sputtering using the compact as a target at the temperature of the glass substrate 2 of 250° C. in a sputtering argon (Ar) atmosphere at an input power of 120 W, and using the ZnO sintered compact as a target, in the same manner as above. A Zn0 layer 5 of approximately 1 μm thick is formed, then a metal oxide layer 6 is formed in the same manner as above using a sintered body consisting of praseodymium oxide (pr2o3) and cobal oxide 1'(CO203') as a target, and then a nickel oxide layer 6 is formed in the same manner as above. (Ni) is formed by vapor deposition to a thickness of 0.5 μm to form the upper electrode 7.
Then, the varistor 1 is obtained.

上述したように前記バリスタ1は、金属酸化物層4を形
成したのちZn0層5を形成したことにより、ZnO層
の界面の凹凸の高低差H0は第2図に示すように最高値
でも200人に減少しZnO層の平坦性が向上する。こ
の結果電流電圧特性における非直線性に悪影響を与える
ことがなくなり、非直線指数αを30にすることができ
た。
As mentioned above, in the varistor 1, since the metal oxide layer 4 is formed and then the Zn0 layer 5 is formed, the height difference H0 of the unevenness at the interface of the ZnO layer is 200 at the highest value as shown in FIG. The flatness of the ZnO layer is improved. As a result, the nonlinearity in the current-voltage characteristics was not adversely affected, and the nonlinearity index α could be set to 30.

また、上記構成のバリスタ1の上部電極7にエツチング
により導電パターンを形成する場合、Zn0層5が金属
酸化物層4,6に挟まれた構成であるため前記上部電極
7の除去部分と共にZnO溶解することがないため、前
記同様に電流電圧特性における非直線性に悪影響を与え
ず容易に導電パターンを形成できる。
Furthermore, when a conductive pattern is formed by etching on the upper electrode 7 of the varistor 1 having the above structure, since the Zn0 layer 5 is sandwiched between the metal oxide layers 4 and 6, the ZnO is dissolved together with the removed portion of the upper electrode 7. Therefore, a conductive pattern can be easily formed without adversely affecting nonlinearity in current-voltage characteristics, as described above.

以上詳述したように本発明によれば、ZnO層の平坦性
が向上でき、電流電圧特性における非直線性に悪影響を
与えず、非直線指数αを太き(でき、かつ上部電極に容
易に導電パターンを形成できるバリスタを提供すること
ができる。
As detailed above, according to the present invention, the flatness of the ZnO layer can be improved, the nonlinearity index α can be increased (and the upper electrode can be easily A varistor that can form a conductive pattern can be provided.

本発明は上記実施例に限定されず種々の変形実施が可能
である。例えば本発明の範囲内であれば、電極に用いる
金属もAu、A1等に、金属酸化物層の金属酸化物も酸
化ビスマス(Bi203)1酸化コバルト(C0203
) 、酸化プラセオジム(pr2o3)及びそれらの混
合物等に、ZnO層もZnO単体だけでなく、ZnOに
アルミニウム (AJ2)、ガリウム(Ga)、インジ
ウム(In)等の添加物を加えたものなど種々に選択可
能であり、またスパッタ雰囲気中の不活性ガスもアルゴ
ン(Ar)に限定されず他のガスであってもよい。
The present invention is not limited to the above-mentioned embodiments, and various modifications can be made. For example, within the scope of the present invention, the metal used for the electrode may be Au, A1, etc., and the metal oxide of the metal oxide layer may be bismuth oxide (Bi203), cobalt monooxide (C0203), etc.
), praseodymium oxide (pr2o3), and their mixtures, etc., and the ZnO layer is not only ZnO alone, but also a variety of ZnO layers with additives such as aluminum (AJ2), gallium (Ga), and indium (In) added to ZnO. The inert gas in the sputtering atmosphere is not limited to argon (Ar), and may be other gases.

またさらに本実施例では電極を蒸着で、他の膜をスパッ
タリングで成膜したがCVD(Chemical Va
porDeposition :化学的気相成長)法等
の他の成膜手段を用いても良い。
Furthermore, in this example, the electrodes were formed by vapor deposition and other films were formed by sputtering, but CVD (Chemical Vapor Deposition) was used.
Other film forming methods such as porDeposition (chemical vapor deposition) may also be used.

[発明の効果] 上記のように本発明によれば、ZnO層の平坦性が向上
でき、電流電圧特性における非直線性に悪影響を与えず
、非直線指数αを大きくでき、かつ上部電極に容易に導
電パターンを形成できる電圧非直線性抵抗素子を提供す
ることが出来る。
[Effects of the Invention] As described above, according to the present invention, the flatness of the ZnO layer can be improved, the nonlinearity index α can be increased without adversely affecting the nonlinearity in the current-voltage characteristics, and the upper electrode can be easily attached to the ZnO layer. A voltage nonlinear resistance element that can form a conductive pattern can be provided.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明によるバリスタ(電圧非直線性抵抗素子
)の断面図、第2図は本発明によるバリスタのZnO層
の平坦性を説明するための図、第3図は従来のバリスタ
の断面図、第4図は従来のバリスタのZnO層の平坦性
を説明するための□図である。 1・・・バリスタ(電圧非直線性抵抗素子)、2・・・
ガラス基板(基材)、3・・・下部電極、4.6・・・
金属酸化物層、 5・・・ZnO層、5a、5b・・・
電位障壁、 7・・・上部電極、Ho・・・ZnO層の
界面の凹凸の高低差。
Figure 1 is a cross-sectional view of a varistor (voltage non-linear resistance element) according to the present invention, Figure 2 is a diagram for explaining the flatness of the ZnO layer of the varistor according to the present invention, and Figure 3 is a cross-sectional view of a conventional varistor. FIG. 4 is a square diagram for explaining the flatness of the ZnO layer of a conventional varistor. 1... Varistor (voltage nonlinear resistance element), 2...
Glass substrate (base material), 3... lower electrode, 4.6...
Metal oxide layer, 5...ZnO layer, 5a, 5b...
Potential barrier, 7... Upper electrode, Ho... Difference in height of unevenness at the interface of ZnO layer.

Claims (1)

【特許請求の範囲】[Claims] 基材と,前記基材上に形成された電極層と,前記電極層
上に金属酸化物層に挟まれたZnO層とにより形成され
た複合層を少なくとも一つ有し、前記複合層の最上部に
電極層を有することを特徴とする電圧非直線性抵抗素子
It has at least one composite layer formed of a base material, an electrode layer formed on the base material, and a ZnO layer sandwiched between metal oxide layers on the electrode layer; A voltage nonlinear resistance element characterized by having an electrode layer on top.
JP1123671A 1989-05-17 1989-05-17 Non-linearity voltage resistance element Pending JPH02303003A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1123671A JPH02303003A (en) 1989-05-17 1989-05-17 Non-linearity voltage resistance element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1123671A JPH02303003A (en) 1989-05-17 1989-05-17 Non-linearity voltage resistance element

Publications (1)

Publication Number Publication Date
JPH02303003A true JPH02303003A (en) 1990-12-17

Family

ID=14866415

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1123671A Pending JPH02303003A (en) 1989-05-17 1989-05-17 Non-linearity voltage resistance element

Country Status (1)

Country Link
JP (1) JPH02303003A (en)

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