JPH0247921A - Current switching type logic circuit - Google Patents

Abstract

PURPOSE:To effectively detect a defective speed by giving an emitter output of an emitter follower transistor(TR) to a base of a reference side TR of a current switching type logic circuit via a high resistor. CONSTITUTION:When a bias current to an output TR Q4 is not made flow because of a failure in the connection to a resistor R3 due to any cause, a potential of an output OUT is clamped to a voltage VREF via a resistor R4. Since the current flowing to the resistor R4 is an input current of a load gate connecting to the next stage and very less, the voltage drop at the resistor R4 is almost zero and the potential at the output OUT is clamped almost equal to the voltage VREF. Thus, when any fault takes place to the connection to the resistor R3, since the output OUT surely malfunctions the gate of the next stage, the defect of speed caused due to the abnormality of the termination resistor is easily detected.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a current switching type logic circuit, and more particularly to a bipolar current switching type logic circuit having an output limiter follower transistor.

[Conventional technology]

Current switching type logic circuits are widely used as typical bipolar basic logic circuits, and are particularly popular as basic circuits of high-speed logic LSIs.

The configuration shown in Figure 3 is common as a circuit format, and an emitter follower circuit is usually added to the output as an impedance conversion in order to obtain high drive capability that can cope with the increase in load wiring length due to increase in the degree of integration. Ru.

An OR logic output is obtained at the OUT terminal for the input levels applied to the input terminals INI and IN2. Input terminal IN
The logic level applied to I and IN2 is equal to the level obtained at the output OUT, and in order to obtain switching operation, the reference side transistor Q3 is set as a reference voltage at an intermediate logic level VRI! to the input/output logic level.
F is applied.

An almost constant bias current is applied to the emitter follower transistor through the resistor R3, and its base-emitter forward voltage (VILE>) remains constant at approximately 0.8■, and the potential obtained at the collector of the transistor Qs It plays the role of level-shifting the signal and providing it to the output OUT.

[Problem to be solved by the invention]

In the conventional current switching type logic circuit described above, even if the connection to resistor R3 is open or abnormal for some reason,
Transistor Q4 obtains a forward voltage of approximately 0.6V due to leakage current to the gate of the next stage, so although the operating speed is abnormally high compared to the normal standard, it operates functionally and is not normally used. Since the low-speed logic LSI tester cannot detect such defects, it has the disadvantage that there is a possibility that a defective product may be shipped.

Especially in the case of LSI, due to the nature of semiconductor integrated circuits, the resistance R
It is thought that process abnormalities in the wiring and connections to 3 will always exist with a certain probability, and in conventional circuits, it is difficult to eliminate by screening poor speed products using normal methods.
This has the disadvantage that there is a high possibility that the device will become defective in the market and will only be found to be defective after being implemented in an actual device.

Note that if any part other than the connection to the resistor R8 becomes open, it will clearly result in a malfunction even at low speeds, so it can be easily detected at an early stage and the head was not closed.

[Means for Solving the Problems] The current switching type logic circuit of the present invention is a bipolar current switching type logic circuit having an emitter follower transistor at the output. It is configured by being connected to the base of the reference side transistor of a current switching type logic circuit.

〔Example〕

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

The details of the operation of the present invention will be explained below with reference to FIG.

Resistors R1 to R2, transistors Q1 to Q, and constant current source 11 form a general current switching type logic circuit,
Depending on the input logic level of the inputs IN, . . . IN2, the logical sum output of the two inputs is obtained at the collector output of the transistor Q3.

On the other hand, the transistor Q4 and the resistor R4 constitute an emitter follower circuit, which shifts the output level obtained at the collector of Q3 by the forward voltage of the transistor Q4 (hereinafter referred to as VB+!) and outputs it to the mechanism IN, IN2. The same output level as the applied level is obtained at the OUT terminal.

vatp is a reference potential, and is normally input to IN, .
set to the center of the input logic level applied to IN2,
Depending on the input logic of inputs IN, IN2, the current of
1 to Q3, and operates so that the required logic is obtained at the output OUT.

Resistor R4 has a new configuration according to the present invention, and other resistors R
, ~R3 is set to an extremely large value compared to R3, and the output O
It is connected between UT and the reference potential VREFI, ie, the base of Q3.

Since this resistor R4 has a high resistance, the current flowing through it is set to be significantly lower than the current flowing through other parts of this circuit, and since VREF is supplied by a stable reference voltage source, the connection of this circuit is As long as R4 is normal, R4 has little effect on its operation, and a small leakage current will cause the output O
It only flows according to the potential difference between UT and VREF.

Next, suppose that for some reason there is an abnormality in the connection to resistor R3 and the bias current no longer flows to Q4.The potential of the output OUT will be changed to VRI! through resistor R4. Clamped to F voltage. In this case, the current flowing through R4 is only the input current of the load gate connected to the next stage, and since this input current is normally the base current and has an extremely small value,
There is almost no voltage drop at R4, and the potential of the output OUT is clamped almost to the same level as VRlLP.

Therefore, if there is an abnormality in the connection to the resistor R3 at the output OUT, the VREF potential is output instead of the logic level that should be obtained, so in order to ensure that the next stage gate malfunctions, the -a low speed Even automatic testers can easily detect speed failures caused by abnormalities in the terminating resistor.

FIG. 2 is a circuit diagram showing a second embodiment according to the present invention.

In this figure, the input/output logic level is higher than in the embodiment of FIG. 1 by the forward voltage of the diode Dl. Due to the high resistor R4 connected between them, if the connection to the resistor R3 is abnormal, the potential of the output OUT is clamped to approximately the center of the normal logic level, and the bias current of Q4 ensures that the gate of the next stage malfunctions. It becomes possible to detect speed defects caused by a small amount of data.

〔Effect of the invention〕

As explained above, in a current switching type logic circuit having an emitter follower transistor at the output, the emitter of the emitter follower, that is, the output terminal is connected to the current switching type logic circuit through a high resistance. ,
During normal operation, it does not affect its function or performance in any way, and if the connection of the ELISA follower transistor to the termination resistor is abnormal, the output level is immediately changed to VS! ! By clamping to F, it is possible to ensure that the next stage gate is malfunctioning, and to detect speed failures caused by this.

As a result, it is possible to reliably eliminate speed defects caused by emitter follower bias current abnormalities in general low-speed functional tests, so it is possible to reliably eliminate speed defects caused by emitter follower bias current abnormalities. The effect is particularly great in circuits.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a first embodiment of the invention, FIG. 2 is a circuit diagram showing a second embodiment of the invention, and FIG. 3 is a circuit diagram showing a conventional example. V ec+ V E+! ...'Power, IN,,IN2・
...Input terminal, OUT...Output terminal, v R,...
・Reference potential, ... constant current source, R1-R5
...Resistor, Q1-Q5...Transistor, Dl...
·diode.

Claims (1)

[Claims] A bipolar current switching type logic circuit having an emitter follower transistor at the output, characterized in that the emitter output of the emitter follower transistor is connected to the base of the reference side transistor of the current switching type logic circuit via a high resistance. Current switching type logic circuit.