JPH0258786B2 - - Google Patents
Info
- Publication number
- JPH0258786B2 JPH0258786B2 JP57060536A JP6053682A JPH0258786B2 JP H0258786 B2 JPH0258786 B2 JP H0258786B2 JP 57060536 A JP57060536 A JP 57060536A JP 6053682 A JP6053682 A JP 6053682A JP H0258786 B2 JPH0258786 B2 JP H0258786B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- silicon film
- sos
- sio
- island
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6302—Non-deposition formation processes
- H10P14/6322—Formation by thermal treatments
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/03—Manufacture or treatment wherein the substrate comprises sapphire, e.g. silicon-on-sapphire [SOS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
- H10P14/6938—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides
- H10P14/6939—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal
- H10P14/69396—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal the material containing at least one rare earth metal element, e.g. oxides of lanthanides, scandium or yttrium
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
- H10P30/209—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species in silicon to make buried insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/061—Manufacture or treatment using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
- H10P90/1912—Preparing SOI wafers using selective deposition, e.g. epitaxial lateral overgrowth [ELO] or selective deposition of single crystal silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
- H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/077—Implantation of silicon on sapphire
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/097—Lattice strain and defects
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/118—Oxide films
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/15—Silicon on sapphire SOS
Landscapes
- Thin Film Transistor (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57060536A JPS58176967A (ja) | 1982-04-12 | 1982-04-12 | 半導体装置の製造方法 |
| US06/483,706 US4494996A (en) | 1982-04-12 | 1983-04-11 | Implanting yttrium and oxygen ions at semiconductor/insulator interface |
| FR8305967A FR2525031B1 (fr) | 1982-04-12 | 1983-04-12 | Dispositif a semi-conducteur dont le semi-conducteur est forme sur un substrat isolant et son procede de fabrication |
| DE19833313163 DE3313163A1 (de) | 1982-04-12 | 1983-04-12 | Halbleiteranordnung und verfahren zu ihrer herstellung |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57060536A JPS58176967A (ja) | 1982-04-12 | 1982-04-12 | 半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58176967A JPS58176967A (ja) | 1983-10-17 |
| JPH0258786B2 true JPH0258786B2 (2) | 1990-12-10 |
Family
ID=13145117
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57060536A Granted JPS58176967A (ja) | 1982-04-12 | 1982-04-12 | 半導体装置の製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4494996A (2) |
| JP (1) | JPS58176967A (2) |
| DE (1) | DE3313163A1 (2) |
| FR (1) | FR2525031B1 (2) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0197948A4 (en) * | 1984-09-28 | 1988-01-07 | Motorola Inc | PROTECTION AGAINST THE DISCHARGE OF A DEPLETION AREA OF A LOAD MEMORY. |
| USH569H (en) | 1984-09-28 | 1989-01-03 | Motorola Inc. | Charge storage depletion region discharge protection |
| US4733482A (en) * | 1987-04-07 | 1988-03-29 | Hughes Microelectronics Limited | EEPROM with metal doped insulator |
| US5024965A (en) * | 1990-02-16 | 1991-06-18 | Chang Chen Chi P | Manufacturing high speed low leakage radiation hardened CMOS/SOI devices |
| US5643804A (en) * | 1993-05-21 | 1997-07-01 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a hybrid integrated circuit component having a laminated body |
| RU2130668C1 (ru) * | 1994-09-30 | 1999-05-20 | Акционерное общество закрытого типа "VL" | Полевой транзистор типа металл - диэлектрик-полупроводник |
| US7858459B2 (en) * | 2007-04-20 | 2010-12-28 | Texas Instruments Incorporated | Work function adjustment with the implant of lanthanides |
| US7807522B2 (en) * | 2006-12-28 | 2010-10-05 | Texas Instruments Incorporated | Lanthanide series metal implant to control work function of metal gate electrodes |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL6614657A (2) * | 1966-02-11 | 1967-08-14 | ||
| IT7826422A0 (it) * | 1977-09-22 | 1978-08-02 | Rca Corp | Circuito integrato planare a silicio su zaffiro (sos) e metodo per la fabbricazione dello stesso. |
| JPS5721856B2 (en) * | 1977-11-28 | 1982-05-10 | Nippon Telegraph & Telephone | Semiconductor and its manufacture |
| US4177084A (en) * | 1978-06-09 | 1979-12-04 | Hewlett-Packard Company | Method for producing a low defect layer of silicon-on-sapphire wafer |
| US4178191A (en) * | 1978-08-10 | 1979-12-11 | Rca Corp. | Process of making a planar MOS silicon-on-insulating substrate device |
-
1982
- 1982-04-12 JP JP57060536A patent/JPS58176967A/ja active Granted
-
1983
- 1983-04-11 US US06/483,706 patent/US4494996A/en not_active Expired - Lifetime
- 1983-04-12 FR FR8305967A patent/FR2525031B1/fr not_active Expired
- 1983-04-12 DE DE19833313163 patent/DE3313163A1/de active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| DE3313163A1 (de) | 1983-10-20 |
| FR2525031B1 (fr) | 1987-01-30 |
| US4494996A (en) | 1985-01-22 |
| FR2525031A1 (fr) | 1983-10-14 |
| JPS58176967A (ja) | 1983-10-17 |
| DE3313163C2 (2) | 1987-07-30 |
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