JPH0282645A - Lead frame - Google Patents
Lead frameInfo
- Publication number
- JPH0282645A JPH0282645A JP23562388A JP23562388A JPH0282645A JP H0282645 A JPH0282645 A JP H0282645A JP 23562388 A JP23562388 A JP 23562388A JP 23562388 A JP23562388 A JP 23562388A JP H0282645 A JPH0282645 A JP H0282645A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- epoxy resin
- pad
- resin
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 9
- 150000001875 compounds Chemical class 0.000 claims description 6
- 239000003822 epoxy resin Substances 0.000 description 17
- 229920000647 polyepoxide Polymers 0.000 description 17
- 229920005989 resin Polymers 0.000 description 8
- 239000011347 resin Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 7
- 230000000694 effects Effects 0.000 description 3
- 239000000945 filler Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 229920001296 polysiloxane Polymers 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
[産業上の利用分野]
本発明は、半導体装置を、実装するリードフレームのタ
イパッドの構造に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the structure of a tie pad of a lead frame on which a semiconductor device is mounted.
[発明の概要]
半導体装置を実装するリードフレームのグイパッド裏面
にSi又は、Si化合物からなる膜を形成することによ
り、グイパッド裏面とエポキシ樹脂の密着性が向上し、
樹脂の吸湿によるクラックを防ぐことができる。[Summary of the Invention] By forming a film made of Si or a Si compound on the back side of the Gui pad of a lead frame on which a semiconductor device is mounted, the adhesion between the back surface of the Gui pad and the epoxy resin is improved.
Cracks caused by moisture absorption of the resin can be prevented.
【従来の技術1
従来のリードフレームを用いて、実装を行った時の断面
構造は第3図に記す如(、リードフレームの裏面が直接
エポキシ樹脂に接していた。この様な構造の場合、エポ
キシ樹脂とリードフレームの間の密着性が悪く、リード
フレームのタイパッドと、エポキシ樹脂との間に、吸湿
した水分が溜まる。[Prior art 1] The cross-sectional structure when mounting is performed using a conventional lead frame is shown in Figure 3 (the back side of the lead frame was in direct contact with the epoxy resin. In such a structure, Adhesion between the epoxy resin and the lead frame is poor, and absorbed moisture accumulates between the tie pad of the lead frame and the epoxy resin.
[発明が解決しようとする課題]
しかし、前述の従来技術では、エポキシ樹脂が吸湿した
状態で、リフロー炉に入れると、リードフレームのタイ
パッドとエポキシ樹脂の間に溜まっていた水分が気化膨
張し、エポキシ樹脂にクラックが入り、半導体装置の信
頼性の低下を招く問題点があった6本発明は、この様な
問題点を解決するもので、その目的とするところは、タ
イパッドと樹脂との間に水分が溜まらずかつ、リードフ
レームと樹脂の密着性を上げることで、樹脂にクラック
が入らないリードフレームの構造を提供することにある
。[Problems to be Solved by the Invention] However, in the above-mentioned conventional technology, when the epoxy resin absorbs moisture and is placed in a reflow oven, the moisture accumulated between the tie pad of the lead frame and the epoxy resin evaporates and expands. There was a problem in which cracks appeared in the epoxy resin, leading to a decrease in the reliability of semiconductor devices6.The present invention is intended to solve these problems, and its purpose is to prevent cracks between the tie pad and the resin. The purpose of the present invention is to provide a structure of a lead frame in which moisture does not accumulate in the resin and cracks do not occur in the resin by increasing the adhesion between the lead frame and the resin.
[課題を解決するための手段1
半導体装置を実装するリードフレームのグイパッドにお
いて、グイパッドの裏面に、Si又は。[Means for Solving the Problem 1] In a lead frame pad on which a semiconductor device is mounted, the back surface of the pad is made of Si or silicone.
Si化合物からなる膜を形成することにより、エポキシ
樹脂中に含まれるSiフィラーとの密着性が、向上する
という特徴を活かした構造を有することを特徴とするリ
ードフレーム。A lead frame characterized by having a structure that takes advantage of the characteristic that adhesion with Si filler contained in an epoxy resin is improved by forming a film made of a Si compound.
〔実 施 例]
以下、本発明について、実施例に基づき、詳細に説明す
る。[Examples] Hereinafter, the present invention will be described in detail based on Examples.
第3図は、従来技術を用い実装した時の断面構造図であ
る。第1図は、本発明を用い実装した時の断面構造図で
ある。第1図の場合、リードフレーム3とエポキシ樹脂
2が直接、接するのではなくSi化合物であるSi酸化
膜4を介して、リードフレームのグイパッドとエポキシ
樹脂が接することで、エポキシ樹脂中に含まれるSiフ
ィラーとリードフレーム裏のSi膜が、V::着し、グ
イパッドとエポキシ樹脂の密着性が向上する。又、Si
酸化膜の他に、多結晶Si及び、Siチップ等、Siを
含有した膜を形成することでも全く同様の効果が得られ
る。FIG. 3 is a cross-sectional structural diagram when mounted using the conventional technology. FIG. 1 is a cross-sectional structural diagram when the present invention is implemented. In the case of Fig. 1, the lead frame 3 and the epoxy resin 2 do not come into direct contact with each other, but the lead frame's lead pad and the epoxy resin come into contact with each other through the Si oxide film 4, which is a Si compound, so that the epoxy resin contained in the epoxy resin is not in direct contact with the epoxy resin. The Si filler and the Si film on the back of the lead frame adhere to each other, improving the adhesion between the Gui pad and the epoxy resin. Also, Si
In addition to the oxide film, the same effect can be obtained by forming a film containing Si, such as polycrystalline Si or a Si chip.
又、それらの膜形成方法は、スパッタ法、スピン塗布法
、CVD法、ダイアタッチ法等と、リードフレーム材質
、形成する膜によって変更する。The film forming method may be a sputtering method, a spin coating method, a CVD method, a die attach method, etc., and may be changed depending on the material of the lead frame and the film to be formed.
又よりいっそうの密着性を上げる為に、グイバンドの裏
面のみならず、樹脂より外に出るリードを除くリード全
面に同様の膜形成をすることで、リード沿いにも水分が
溜まらない実施例の断面構造図を第2図に記す。In addition, in order to further improve adhesion, a similar film is formed not only on the back side of the Gui-band but also on the entire surface of the leads, except for the leads that protrude from the resin, so that moisture does not accumulate along the leads. The structural diagram is shown in Figure 2.
[発明の効果]
本発明の効果は、リードフレームのダイパ・ンドの裏面
に、Si又は、Si化合物膜層を形成することにより、
Si膜と、樹脂中に含まれるSiフィラーが密着し、グ
イパッド裏面とエポキシ樹脂4脂の密着性が向上する為
、エポキシ樹脂が吸湿しても、グイパッド下に水分が溜
まらないので、モールド樹脂のクラックをなくすことが
できた。又、これにより半導体装置の信頼性が向上した
。[Effect of the invention] The effect of the invention is that by forming a Si or Si compound film layer on the back surface of the die pad of the lead frame,
The Si film and the Si filler contained in the resin adhere to each other, improving the adhesion between the back side of the Gui Pad and the epoxy resin 4. Even if the epoxy resin absorbs moisture, moisture does not accumulate under the Gui Pad, so the mold resin I was able to eliminate cracks. This also improved the reliability of the semiconductor device.
第1図は、本発明を用いて半導体装置を実装した時の断
面構造図である。
第2図は、本発明を用いた実施例の断面構造図である。
第3図は、従来技術を用いて半導体装置を実装した時の
断面構造図である。
始り図
1・・・半導体装置
2・・・エポキシ樹脂
3・・ ・リードフレーム
4・・・Si並ひに81化合物
以上
出願人 セイコーエプソン株式会社
代理人 弁理士 上 柳 雅 誉(他1名)垢三区FIG. 1 is a cross-sectional structural diagram when a semiconductor device is mounted using the present invention. FIG. 2 is a cross-sectional structural diagram of an embodiment using the present invention. FIG. 3 is a cross-sectional structural diagram when a semiconductor device is mounted using the conventional technique. Starting diagram 1...Semiconductor device 2...Epoxy resin 3...Lead frame 4...Si and more than 81 compounds Applicant Seiko Epson Co., Ltd. Representative Patent attorney Masayoshi Kamiyanagi (1 other person) )Kakusanku
Claims (1)
いて、タイパッドの裏面に、Si又は、Si化合物から
なる膜を形成する構造を有する事を特徴とするリードフ
レーム。A lead frame having a structure in which a film made of Si or a Si compound is formed on the back surface of the tie pad of a lead frame on which a semiconductor device is mounted.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23562388A JPH0282645A (en) | 1988-09-20 | 1988-09-20 | Lead frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23562388A JPH0282645A (en) | 1988-09-20 | 1988-09-20 | Lead frame |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0282645A true JPH0282645A (en) | 1990-03-23 |
Family
ID=16988754
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23562388A Pending JPH0282645A (en) | 1988-09-20 | 1988-09-20 | Lead frame |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0282645A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011054607A (en) * | 2009-08-31 | 2011-03-17 | Denso Corp | Resin sealing type semiconductor device, and method of manufacturing the same |
| JP2018098251A (en) * | 2016-12-08 | 2018-06-21 | 株式会社豊田中央研究所 | Semiconductor module and method for manufacturing the same |
-
1988
- 1988-09-20 JP JP23562388A patent/JPH0282645A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011054607A (en) * | 2009-08-31 | 2011-03-17 | Denso Corp | Resin sealing type semiconductor device, and method of manufacturing the same |
| JP2018098251A (en) * | 2016-12-08 | 2018-06-21 | 株式会社豊田中央研究所 | Semiconductor module and method for manufacturing the same |
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