JPH0295248U - - Google Patents
Info
- Publication number
- JPH0295248U JPH0295248U JP1989002181U JP218189U JPH0295248U JP H0295248 U JPH0295248 U JP H0295248U JP 1989002181 U JP1989002181 U JP 1989002181U JP 218189 U JP218189 U JP 218189U JP H0295248 U JPH0295248 U JP H0295248U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- coolant
- liquid
- circuit device
- bellows
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/877—Bump connectors and die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
Description
第１図は本考案に係る液冷構造の一実施例を示
す断面図、第２図は本考案に係る液冷構造の他の
実施例を示す断面図。 １０…冷却液流路、１４…ベローズ、１８…集
積回路素子、２０…シート部材、２２…伝熱板、
２４…接合材、２６…ベローズ底面。
す断面図、第２図は本考案に係る液冷構造の他の
実施例を示す断面図。 １０…冷却液流路、１４…ベローズ、１８…集
積回路素子、２０…シート部材、２２…伝熱板、
２４…接合材、２６…ベローズ底面。
Claims (1)
- 【実用新案登録請求の範囲】 プリント基板１６上に実装された集積回路素子
１８の上面に冷却液１１を導いて前記集積回路素
子を液冷する集積回路素子の液冷構造であつて、 複数の集積回路素子の上部に冷却液を導く冷却
液流路１０と、 該冷却液流路の途中から前記集積回路素子の上
面へ冷却液を導くベローズ１４と、 該ベローズの底面２６に設けられ、良熱伝導性
材料から成る伝熱板２２と、 該伝熱板２２と前記ベローズの周辺部領域との
間隙を充填して接合する良熱伝導性材料から成る
接合材２４と、 を具備したことを特徴とする集積回路素子の液冷
構造。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989002181U JPH0295248U (ja) | 1989-01-13 | 1989-01-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989002181U JPH0295248U (ja) | 1989-01-13 | 1989-01-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0295248U true JPH0295248U (ja) | 1990-07-30 |
Family
ID=31202731
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989002181U Pending JPH0295248U (ja) | 1989-01-13 | 1989-01-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0295248U (ja) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2016119451A (ja) * | 2014-10-14 | 2016-06-30 | インテル・コーポレーション | マルチチップパッケージに対する熱除去アセンブリの自動的な高さ補償、および共平面の水平化 |
-
1989
- 1989-01-13 JP JP1989002181U patent/JPH0295248U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2016119451A (ja) * | 2014-10-14 | 2016-06-30 | インテル・コーポレーション | マルチチップパッケージに対する熱除去アセンブリの自動的な高さ補償、および共平面の水平化 |
| US9743558B2 (en) | 2014-10-14 | 2017-08-22 | Intel Corporation | Automatic height compensating and co-planar leveling heat removal assembly for multi-chip packages |