JPH0314372B2 - - Google Patents

Info

Publication number
JPH0314372B2
JPH0314372B2 JP59209130A JP20913084A JPH0314372B2 JP H0314372 B2 JPH0314372 B2 JP H0314372B2 JP 59209130 A JP59209130 A JP 59209130A JP 20913084 A JP20913084 A JP 20913084A JP H0314372 B2 JPH0314372 B2 JP H0314372B2
Authority
JP
Japan
Prior art keywords
block
frame
synchronization
frame synchronization
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59209130A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6188627A (ja
Inventor
Nobuyuki Tokura
Yoshinori Oikawa
Yoshiro Fukuchi
Kenzo Oono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Mobile Communications Co Ltd
Panasonic Holdings Corp
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Matsushita Communication Industrial Co Ltd
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp, Matsushita Communication Industrial Co Ltd, Matsushita Electric Industrial Co Ltd filed Critical Nippon Telegraph and Telephone Corp
Priority to JP59209130A priority Critical patent/JPS6188627A/ja
Publication of JPS6188627A publication Critical patent/JPS6188627A/ja
Publication of JPH0314372B2 publication Critical patent/JPH0314372B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/048—Speed or phase control by synchronisation signals using the properties of error detecting or error correcting codes, e.g. parity as synchronisation signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP59209130A 1984-10-05 1984-10-05 フレ−ム同期引込み方法 Granted JPS6188627A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59209130A JPS6188627A (ja) 1984-10-05 1984-10-05 フレ−ム同期引込み方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59209130A JPS6188627A (ja) 1984-10-05 1984-10-05 フレ−ム同期引込み方法

Publications (2)

Publication Number Publication Date
JPS6188627A JPS6188627A (ja) 1986-05-06
JPH0314372B2 true JPH0314372B2 (de) 1991-02-26

Family

ID=16567778

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59209130A Granted JPS6188627A (ja) 1984-10-05 1984-10-05 フレ−ム同期引込み方法

Country Status (1)

Country Link
JP (1) JPS6188627A (de)

Also Published As

Publication number Publication date
JPS6188627A (ja) 1986-05-06

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees