JPH0318018A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To control the neutralization of positive charge which is inputted into a silicon substrate readily by biasing the potential of a sample stage when ions are implanted to the negative potential, and obstructing the injection of electrons. CONSTITUTION:An insulating film 2 is formed on one main surface of a semiconductor substrate 1. A conducting film 3 is formed on the insulating film 2. A pattern is formed for the insulating film 2 and the conducting film 3. Ions are implanted into one main surface of the conducting film 3. At this time, electrons 6 are projected on one main surface of the conducting film 3 in order to neutralize the positive charge. Bias charge 8 is applied on a sample stage 4 for holding the semiconductor substrate 1. Potential difference is not formed between the silicon substrate and the polycrystalline silicon of a gate electrode in the ion implanting step in this way. Therefore, deterioration of breakdown strength of a gate oxide film and the occurrence of breakdown can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having a MOS type transistor or an MIS type transistor.

Conventional technology In recent years, with the miniaturization and high integration of semiconductor devices, M
Progress is being made in thinning gate oxide films of OS type transistors. Along with this, deterioration in breakdown voltage and destruction of the gate oxide film due to charge-up during the ion implantation process have become a problem.

A method of manufacturing a semiconductor device having a conventional n-ch' MOs transistor will be described below.

As shown in FIG. 2, a gate oxide film 2 is formed on the main surface of a silicon substrate 1 by thermal oxidation (a), and a polycrystalline silicon 3 is formed on the gate oxide film by CVD (b).
. Thereafter, the polycrystalline silicon 3 and the gate oxide film are patterned by dry etching (C). Next, an impurity such as As+5 is implanted by ion implantation to form an n+ type diffusion region 7 which becomes a source and a drain (d). At this time, the ion dose is I x 1
If it exceeds 0"cm', positive charges will be injected into the silicon substrate and the impurity dose will become less uniform due to the charge-up. Secondary electrons 6 are irradiated onto the silicon substrate 1 for the purpose of implantation into the silicon substrate 1.Also, when implanting the source and drain regions 7 of an n-channel type MOS transistor, As + 40keV, 5×10I5cm”
The secondary electron current was 1.5 mA at the following dose. In this case, secondary electrons were irradiated for the purpose of improving the uniformity of the ion-implanted layer and preventing destruction of the gate oxide film.

Problems to be Solved by the Invention However, in such a manufacturing method, since the energy distribution of secondary electrons is O to 100 eV, the silicon substrate is charged up to a negative potential by irradiation with secondary electrons. In reality, it is difficult to reduce the charge-up to a sufficiently low level by controlling the current value of secondary electrons, and this charge-up causes M
There was a problem that the gate oxide film of the OS transistor was destroyed.

Means for Solving the Problems To achieve this object, the method for manufacturing a semiconductor device of the present invention includes forming an insulating film on one principal surface of a semiconductor substrate, forming a conductive film on the insulating film, and then forming a conductive film on the insulating film. The insulating film and the conductive film are patterned, ions are implanted onto one main surface of the conductive film, and at this time, electrons are irradiated onto one main surface of the conductive film to neutralize positive charges. At the same time, a bias charge is applied to the sample stage to hold the semiconductor substrate.

Due to the manufacturing method described above, electron injection is prevented by negatively biasing the potential of the sample stage during ion implantation, making it easy to control the neutralization of positive charges incident on the silicon substrate. be able to.

Embodiment FIG. 1 is a sectional view showing an embodiment of the method of manufacturing a semiconductor device of the present invention.

FIG. 1 shows a method of manufacturing a semiconductor device having an n-ch MOS type transistor. A gate oxide film 2 of about 200 Å is formed on the main surface of the silicon substrate 1 by thermal oxidation (a), and a 4000 Å of first polycrystalline silicon 3 that will become a gate electrode is formed on the gate oxide film by CVD method (
b). Thereafter, the first polycrystalline silicon and oxide film are patterned by dry etching (C). Then, by ion implantation, impurities such as As'' were introduced at 50 keV.
By injecting X10''cva-2, an n+ type diffusion region 7(d) which becomes a source or drain is formed.At this time, the current value of secondary electrons is 15 mA, and the bias voltage to the sample stage is set to -5 to -5 mA. Charge-up due to excessive electrons can be suppressed by controlling the voltage to -15V.When the bias voltage to the sample stage is Ov, the MO
Since the potential difference applied between the electrode and the substrate of the S transistor is about 15V, by setting the bias voltage to -5 to -15V, the voltage applied to the gate oxide film becomes 10V or less, and the gate oxide film of the MOS transistor The destruction of
Even when the area is 10wIII+2 and the oxide film thickness is 200A, it almost disappears.

Furthermore, a semiconductor device having a p-ch MOS type transistor can be similarly formed by implanting B+ or BF2+ instead of As+ in the ion implantation process.

Effects of the Invention When the method for manufacturing a semiconductor device according to the present invention is used, no potential difference is generated between the silicon substrate and the polycrystalline silicon of the gate electrode during the ion implantation process, so that the withstand voltage of the gate oxide film deteriorates or is destroyed. can be prevented.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing a method for manufacturing a semiconductor device according to a first embodiment of the present invention, and FIG. 2 is a sectional view showing a conventional method for manufacturing a semiconductor device. 1...Silicon substrate, 2...Gate oxide film, 3...Polycrystalline silicon, 4...
Sample stage, 5...Arsenic, 6...Secondary electrons, 7...Diffusion layer region, 8...Bias power supply.

Claims (1)

[Claims] A step of forming an insulating film on one main surface of a semiconductor substrate, a step of forming a conductive film on the insulating film, a step of patterning the insulating film and the conductive film, and a step of forming one main surface of the conductive film. a step of irradiating electrons onto one main surface of the conductive film to neutralize positive charges in the ion implantation step; and a step of holding the semiconductor substrate in the ion implantation step. A method for manufacturing a semiconductor device, comprising the step of applying a bias charge to a sample stage.