JPH03181211A - Modulation circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a modulation circuit that modulates a color signal when recording a video signal on a magnetic tape or reproducing a video signal from a magnetic tape.

Conventional video signals include a color signal for coloring the screen and a luminance signal for representing the brightness of the screen.

Among these, in the NTSC system, when recording color signals on magnetic tape, the frequency is changed from 3.58 MHz to 630K.
The frequency is converted to Hz. When reproducing a color signal, the frequency is converted from 630 KHz to 3.58 M[(z). Here, a modulation circuit is used for frequency conversion.

A conventional modulation circuit used for this purpose is shown in FIG.
This will be explained with reference to this.

This circuit consists of a transistor Q1 connected to input terminal 1.
, transistor Q2 to which voltage source v1 is connected, transistors Q3, Q4, and Qs, transistor Q6 to which the output terminal is connected, a modulation circuit consisting of resistors R2 and R3, current sources 11 and I2, and transistors Q7 and QB. and resistance R
4, a buffer circuit consisting of current source 3, 14, and I5, a transistor Q+o connected to input terminal 2, a transistor Q+o connected to voltage source 2, resistors R5 and R6, and a current source It consists of a carrier amplification circuit consisting of I6.

The operation of the conventional modulation circuit configured as described above will be described below.

First, the DC bias voltage of input terminal 1 V lnl +oC
1 is equal to the DC bias voltage of voltage source v1.

V+1Izoc+=V+
--fl) v,; DC bias voltage of input terminal 1 and DC bias voltage of voltage source V, then DC bias voltage of input terminal 2 Vln2+DC+
It is assumed that is equal to the DC bias voltage of voltage source 2.

V l R2 + DC1 = V 2
・” ・・−(21V2・D of input terminal 2
C bias voltage and DC bias voltage of voltage source v2 Here, it is assumed that vI and v2 are voltages at which transistors Q+ and Q2 and transistors Q9 and Q+o are not saturated.

First, the DC bias voltage V of the output terminal 3. ulN)C1
Assuming that all the transistors used have the same characteristics, the following equation is obtained.

0 Vout(Dc+=Vec R3・□...
...(3) Vec', voltage 1o applied to power supply terminal 4; current value R3 of current sources II and 12; resistance value of resistor R3. Also, the bases of transistors Q4 and Qs, and the transistors Q3 and Q6 DC noise voltage Vc applied to the base of
ar+oc+ becomes the following formula.

4 e oe V[lE; VBE ・・・・・・(
4) Resistance value of resistor R4 Resistance value of resistors R5 and R6 Current source I3, I4 and l5Illit current value Voltage between the base and emitter of transistors Q7 and Qs Next, input terminal 1 has a DC voltage expressed by equation (1). With the bias voltage applied, the following signal V+ozAc+
Enter.

V 1nlfAcl = A s i n Wlt
--(4)A; Amplitude W+ of the input signal, angular frequency t; Time Also, with the DC bias voltage shown in equation (2) being applied to the input terminal 2, the following signal Vln2+AC
Enter +.

V 1n2fAcl = B s i nω2 t
・−・−・(51B; Amplitude ω2 of input signal; Angular frequency Next, ACC signal applied from input terminal 2 to the bases of transistors Q6 and Q3 via the carrier amplifier circuit c a
Let r + (^C) be the following formula.

V c a r I (^c+=csinω2t
-... (6) C. Amplitude of AC signal at the bases of transistors Q6 and Q3 Also, AC signal V at the bases of transistors Q3 and Q6
...r2(^C) is a component whose electrical angle differs by 180 degrees in equation (6) is transmitted.

Vear2tAc+ = −Cs in ω2 t
-(When a signal such as 71 or above is input, the AC signal v0.(^C) transmitted to the output terminal 3 is expressed by the following equation.

・sin ω2t・・・・・・(8)
R1; resistance value k of resistor RI; Portzmann constant T; absolute temperature q; elementary charge However, there is a capacitance Cjc between the collector and base of transistor Q6, and AC at the base of Q6
The signal component leaks into the output terminal 3. This leakage amount is V c
When a v l L e k l, it is expressed by the following formula.

Therefore, the AC component V Ou 1 transmitted to the output terminal 3
is expressed by the following equation.

(IG) Problems to be Solved by the Invention As shown above, in the conventional example shown in FIG. This caused the VTR's image quality to deteriorate.

An object of the present invention is to provide a modulation circuit that can theoretically reduce this frequency leakage to zero.

Means for Solving the Problems In order to achieve this object, the modulation circuit of the present invention outputs a buffer with one AC signal and a DC voltage instead of two AC signals with electrical angles different by 180 degrees. .

Effect: According to this configuration, compared to conventional modulation circuits, the signal component leaking into the output can be reduced to zero.

Embodiments Below, embodiments of the modulation circuit of the present invention will be described with reference to the circuit diagram shown in FIG.

This circuit has a base connected to the input terminal 1, an emitter connected to the emitter of the second transistor through the first resistor and a ground point through the first current source, and a collector connected to the emitter of the third transistor and the a first transistor connected to the emitter of the transistor No. 4; a base connected to a ground point via a first voltage source; an emitter connected to the first resistor and a second current source; and a collector connected to the fifth transistor. emitter and the sixth
a second transistor whose collector is connected to the emitter of the fourth transistor and the collector of the fourth transistor through the second resistor; whose emitter is connected to the emitter of the fourth transistor and the collector of the first transistor; The third transistor is connected to the ground point via the base of the transistor, the emitter of the seventh transistor, and a third current source, the collector is connected to the power supply terminal, and the emitter is connected to the emitter of the third transistor and the third transistor. The collector of the first transistor is connected to the fourth transistor, the base of which is connected to the ground via the base of the fifth transistor, the emitter of the eighth transistor, and a fourth current source, and the collector is connected to the power supply terminal. the fifth transistor, the emitter of which is connected to the emitter of the sixth transistor and the collector of the second transistor; the collector is connected to the output terminal 3 and the power supply terminal via the third resistor; the emitter of the fifth transistor, the collector of the second transistor, and the base of the third transistor connected to the ground via the base of the third transistor, the emitter of the seventh transistor, and the third current source; a modulation circuit including a sixth transistor, a collector connected to a power supply terminal, an emitter connected to a ground point via the base of the third transistor, the base of the sixth transistor, and the third current source; is connected to a power supply terminal via a fourth resistor and to a ground point via a fifth current source; a collector is connected to the power supply terminal, and an emitter is connected to the base of the fourth transistor an eighth transistor, the base of which is connected to a ground point via the fifth transistor and the fourth power source, and the base is connected to one end of a sixth resistor and the collector of the ninth transistor; With the buffer ringing bell,
The collector is connected to the base of the eighth transistor and the sixth transistor.
the ninth transistor, whose base is connected to the ground point via the second voltage source V2, and whose emitter is connected to the emitter of the tenth transistor and the rubbing point via the sixth current source; , the base is connected to the output terminal 2, the emitter is connected to the ground point via the emitter of the ninth transistor and the sixth current source, and the collector is connected to one end of the sixth resistor and the fifth
and a carrier amplification circuit constituted by the tenth transistor connected to the power supply terminal via the resistor.

The operation of the modulation circuit of this embodiment configured as described above will be explained below.

First, the DC bias voltage of input terminal 1 V+++IfDC1
is assumed to be equal to the DC bias voltage of voltage source V1.

V Inl fDc) -V I ・
(11) Here, it is assumed that Vl is a voltage at which transistors Q1 and Q2 are not saturated.

Next, it is assumed that the DC bias voltage V+nzoc+ of the input terminal 2 is equal to the DC bias voltage of the voltage source V2.

V , R2fDel = V 2 --
(12) Here, it is assumed that Vl is a voltage at which transistors Q9 and Q+o are not saturated.

Next, the DC bias voltage V0° at the output terminal 3. .

Assuming that all the transistors used have the same characteristics, the following equation is obtained.

O V,uzoc+ = Vce-R3・□・=”(13)
The current value of IO1 current source ■ and 12 is also the DC bias voltage V transmitted from the carrier amplifier to the bases of transistors Q4 and Q5 via the buffer circuit.
caB(oc+ is the following formula.

Vem++toc+ = Vec Rs ” I O
c R6, knee-VBE8...
...(14) R5; resistance value IQe of resistor R5; current source I3, 14. Is, IS current value ■8E
8; Voltage between the base and emitter of transistor Q8 Also, the DC voltage Vcar2toc+ transmitted from the buffer circuit to the bases of transistors Q3 and Q6 is expressed by the following equation.

Ver-r2+oc+ = VecR4・IocVeE
t--(15) R4, resistance value Vec7 of resistor R4; voltage between the base and emitter of transistor Q7. Assuming that the characteristics of the transistors are equal, the following can be said.

VBE8 = VBE7 --
(16) Furthermore, it is assumed that the following relationship holds between the resistor R4 and the resistors R5 and R6.

R4=R5+ "' 2...(17) Formula (16)
From equation (17), the following can be said.

V ear fDel = V car2 (Dcl
Drop -' ”・(18) Therefore, if equations (16) and (17) are satisfied, transistors Q3 and Q6
The base potential of transistors Q4 and Q5 become equal.

Next, with the DC bias voltage shown in equation (11) being applied to input terminal 1, the following main signal VIII
Enter IIAC+.

V+nzAc+=A s i nωI t −・
−・・−(19) Also, D shown in equation (2) at input terminal 2
While the C bias voltage is being applied, the following carrier signal VIII2C is input.

V 1n2(^c) = B S i n (1)2
t --(20) AC signal V which is transmitted to the bases of transistors Q4 and 05 via a carrier amplification circuit and a buffer circuit. Let rl+^C) be the following formula.

Vcar++＾c+ = CS i nω2t……(2
1) Furthermore, the AC signal Vemrz+xc+ transmitted to the bases of transistors Q3 and Q6 is expressed by the following equation.

V c, a r 2 L^c〉=0
(22) From the above, the AC signal Vou+fAC+ transmitted to the output terminal 3 is expressed by the following equation.

−s in (112t −”(2
3) Also, the collector-base capacitance J of transistor Q6
The carrier signal Vcar, Lgek+ transmitted from I CJ C to the output terminal 3 is expressed by the following equation from equation (22).

Vcar,esii==0...
...(24) Therefore, the AC component ■ transmitted to the output terminal 3. . .

is expressed by the following equation.

V Out = V ou+ tAc+ + V ea
It is possible to reduce the leakage of the carrier signal.

Effects of the Invention According to the modulation circuit of the present invention, leakage of carrier signal components can be theoretically reduced to zero. As a result, the accuracy of the modulation circuit is improved.

[Brief explanation of drawings]

FIG. 1 is a modulation circuit diagram according to an embodiment of the present invention, and FIG. 2 is a circuit diagram of a conventional killer circuit. 1...Input terminal 1.2...Input terminal 2
．． 3... Output terminal, 4... Power terminal,
5...Modulation circuit, 6...Buffer circuit, 7...Carrier amplification circuit, Ql, Q2.
Q3. Q4. Qs+Ql), Q7. Qs,
Q9゜0 +o--transistor, R1, R2, R3,
R4, R5...Resistance, II, 12. I
3. ．． 14. 15. I6...Current source,
V,, V2... Voltage source.

Claims (1)

[Claims] The base is connected to input terminal 1, and the emitter is connected to the first resistor and the first
a first transistor having a collector connected to the emitter of the third transistor and an emitter of the fourth transistor to ground via a current source, and a base to ground via a first voltage source; a second transistor whose collector is connected to the ground point via the first resistor and the second current source, whose collector is connected to the emitter of the fifth transistor and the emitter of the sixth transistor, and whose collector is connected to the second resistor. the third transistor, whose base is connected to the base of the sixth transistor, the emitter of the seventh transistor, and a ground point via a third current source; and the collector is connected to the power terminal. , the base is connected to the fifth base and the eighth base.
the fifth transistor whose emitter is connected to a ground point via the fourth current source; and the sixth transistor whose collector is connected to the power supply terminal via the output terminal 3 and a third resistor. a modulation circuit comprising: a modulation circuit having a collector connected to a power supply terminal and a base connected to the power supply terminal via a fourth resistor and a ground point via a fifth current source;
the eighth transistor, the collector of which is connected to the power supply terminal, the base of which is connected to one end of the sixth resistor and the base of the tenth transistor, the third current source, and the fourth current source. a buffer circuit consisting of a base connected to a ground point via a second voltage source, and an emitter connected to a tenth point
the tenth transistor connected to the emitter of the transistor and connected to a ground point via a sixth current source;
It is characterized by comprising a carrier amplification circuit including the tenth transistor whose base is connected to the input terminal 2 and whose collector is connected to one end of the sixth resistor and connected to the power supply terminal via the fifth resistor. Modulation circuit.