JPH0318226A - High-voltage pulse noise absorbing element - Google Patents

Abstract

PURPOSE:To eliminate a high-voltage pulse noise from the outside by dividing the opposite conductivity low-concentration diffusion layer, which is formed in contact with one conductivity type semiconductor substrate, into two parts and by bonding are conductivity type high-concentration and low-concentration diffusion layers and a gate electrode between the two parts. CONSTITUTION:A one conductivity type semiconductor substrate 1 and two low- concentration diffusion layers 2, 3 of conductivity type opposite to that of the substrate are provided at distance L1 and a thick oxide 9 of L2 in length and at distance L3 from the low-concentration diffusion layers 2, 3 is caused to grow in the region 10 between both diffusion layers. In the central parts of the low-concentration diffusion layers 2, 3, the same conductivity type high-concentration diffusion layers, 4, 5 as 2, 3 are formed so as not to protrude from the low-concentration diffusion layers 2, 3. Between the high-concentration diffusion layers 4, 5, the same conductivity type low-concentration diffusion layers 6, 7 as the diffusion layers 2, 3 are formed in the manner of being shallower than the layers 2, 3, and bonded to the oxide 9. An electrode 8 on the oxide 9 and the high-concentration diffusion layer 4 are connected to form high breakdown strength output terminal Vout. The high-concentration diffusion layer 5 is connected to a fixed high-voltage terminal VPP. Thus, a high-voltage pulse noise from the outside is removed effectively.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is directed to a high breakdown voltage output terminal of an open drain MOSFET of a MOS semiconductor integrated circuit, and is designed to reduce high voltage induced by the coupling capacitance of an external load circuit. This invention relates to an element that absorbs voltage parnu noise.

Conventional technology Figure 3 shows the conventionally used open drain type MO
A diffused resistance element that is part of SFET's high breakdown voltage output element is shown. A conductive type semiconductor substrate or a low concentration diffusion layer 12 of a conductive type opposite to that of the well diffusion layer 11 formed therein.
, and in order to make contact with both ends thereof, high concentration diffusion layers 13 and 14 of the conductivity type opposite to that of the substrate or well diffusion layer 11 are provided. The potential is connected to the high voltage power supply terminal vPP. FIG. 4 shows its equivalent circuit, where R is the resistance value of the diffused resistor.

3. Problems to be Solved by the Invention In FIG. 3, the voltage output to the VOUT terminal 13 is from vDD to vPP. Here, vDD is the power supply voltage of the integrated circuit, and vPP is the voltage value of the high voltage power supply. The vOUT terminal 11 is affected by parasitic pulse noise generated from a rectangular wave from another adjacent voUT terminal due to the influence of stray capacitance on a wiring board of an external device such as a fluorescent display tube. Example, tVDD-5V, Vp
When p=-3o■, the vOUT terminal 13 is fixed at the PP potential, and another vOUT terminal is 5v to -30v.
1 and generates a rectangular wave, theoretically a voltage of Vout=-65 V'4 will be generated in a pulsed manner at the vOUT terminal 13, but the low concentration diffusion layer 1
The withstand voltage of 2 is required to be approximately 2×1vPP−vDD1=70V.

This withstand voltage is more than twice the voltage value of the high voltage power supply used. In the manufacturing technology of MOS-LSI, which is becoming increasingly finer, this withstand voltage is nearing its limit, and it is becoming difficult to solve the problem using manufacturing technology alone.

If an element with an element breakdown voltage of 2 x 1 vPP - 1 OD1 or less is used, the element will be destroyed due to the influence of pulse noise and deteriorated due to characteristic fluctuations.

Means to Solve the Problem In order to prevent pulse noise from occurring at the high voltage output terminal, when the absolute value of the potential generated at the high voltage output terminal becomes larger than the absolute value of the high voltage power supply potential This is made possible by installing an element that connects the high voltage output terminal and the high voltage power supply terminal, and a high voltage pulse noise absorbing element, in parallel with the conventional diffused resistance element.

Function The high voltage pulse noise absorbing element according to the present invention has two terminals, a high voltage output terminal and a high voltage power supply terminal, as a source and a drain, and a gate is connected to the high voltage output terminal. The drain and the drain are connected to the conductive semiconductor substrate 1 or the well formed therein.
The structure shall have a withstand voltage higher than or equal to the above. The resistance of the conventional diffused resistance element is R, and the resistance of the high voltage pulse noise absorbing element according to the present invention is r, ? / If the threshold voltage is V, the operating state of the element is 1) VDD
>VOUT>VPP+VI (if D, Bvd<vPP-v
DD r >> R (R; 1ooKΩ) 2) In the case of vOUT VPP+■■, Bvd ta○ r((R is divided into two states.

Here, Bvd indicates the withstand voltage between the drain and the drain of the high voltage pulse noise absorbing element, and the drain and drain are assumed to be P-type diffusion layers.

1) is applicable when the high voltage output terminal is in normal operating condition.
Non-conduction occurs between the source and drain of the pulse noise absorbing element.

2) is the case when panoramic noise of less than vPP occurs at the high voltage output terminal, and the pulse noise absorbing element becomes conductive.

Embodiment FIG. 1 shows an embodiment according to the present invention. Two low concentration diffusion layers 2 and 3 of the conductivity type opposite to the conductivity type semiconductor substrate 1 or the well diffusion layer 1 formed therein are installed separated by a distance L1, and a low concentration diffusion layer N2 is placed in the intermediate region 10.
, 3 by a distance L3, and a thick oxide film 9 having a length L2 is grown.

A high concentration diffusion layer 4.5 of the same conductivity type as the low concentration diffusion layers 2 and 3 is formed in the center of the low concentration diffusion layers 2 and 3 so as not to protrude from the low concentration diffusion layers 2 and 3. The low concentration diffusion layer 2.3 may be formed after the formation of the high concentration diffusion layers 4 and 5. From the edge of the thick oxide film placed between the low concentration diffusion layers 2 and 3 to the high concentration diffusion layers 4 and 5, the diffusion depth is shallower than that of the low concentration diffusion layers 2 and 3, and the low concentration diffusion layer 2 , 3 are formed with low concentration diffusion layers 6 and 7 of the same conductivity type. low concentration diffusion layer 2,
A gate electrode 8 is placed on the thick oxide layer having a length L2 placed in the middle of the gate electrode 3. The structure of the diffusion in the semiconductor substrate is such that it is symmetrical left and right with the center of the gate electrode as the center line, and the gate electrode is connected to the high concentration diffusion layer 4 to form a high breakdown voltage output terminal (vOUT terminal). . The other high concentration diffusion layer 5 is a high voltage power supply terminal (VPP terminal) with a fixed potential.The threshold voltage at which this device operates is controlled by the low concentration diffusion layer 2.
, 3 distance L1, the length L2 of the thick oxide film, the surface concentration in the region of 10, the high concentration diffusion j in the low concentration diffusion layers 6 and 7,
The distance L4 from the edge 5 to the edge 1 of the thick oxide film is determined.

FIG. 2 is an equivalent circuit diagram of a case where an element produced by this method is added in parallel to a conventional diffused resistor element.

Effects of the Invention By using the device according to the present invention, it is possible to eliminate high voltage pulse noise due to coupling capacitance from an external load circuit in a high voltage output device of an open drain MOSFET. The voltage output element characteristics can be stabilized and reliability can be improved, and restrictions on MOS-LSI manufacturing technology can be alleviated.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of a pulse noise absorbing element according to the present invention, FIG. 2 is a circuit diagram showing how to utilize the present invention using an equivalent circuit, and FIG. 3 is a cross-sectional diagram showing a conventional diffusion resistor. Fourth
The figure is a circuit diagram showing a conventional example using an equivalent circuit. 1... Conductivity type semiconductor substrate 1 or a well diffusion layer formed therein, 2, 3... Low concentration diffusion layer of the opposite conductivity type to 1, 4, 5... ...High concentration diffusion layer of the conductivity type opposite to 1, 6, 7...Low concentration diffusion layer of the same conductivity type as 2, 3, 8...Gate electrode, 9.・
... Thick oxide film, 10 ... Low concentration diffusion layer 6
．． 7, 11... conductive semiconductor substrate 1
or a well diffusion layer formed therein, 12...
Low concentration diffusion layer of conductivity type opposite to 11, 13.14...
...11 and a high concentration diffusion layer of anti-Kari conductivity type, 15...
...Thick oxide film, L1...Low concentration diffusion layer 2,
3, L2... Length of thick oxide film, L
3... Distance between the edge of the thick oxide film and the low concentration diffusion layers 2 and 3, L4... Distance between the edge of the thick oxide film and the high concentration diffusion layers 4 and 5 Distance, r...Resistance of the element according to the present invention, R...Resistance of the conventional diffused resistor, vOUT...High voltage output terminal voltage, terminal name, ■
PP...High voltage power supply terminal voltage, terminal name.

Claims (1)

[Claims] A high concentration diffusion layer of the same conductivity type as the low concentration diffusion layer is formed in a semiconductor substrate of one conductivity type or a low concentration diffusion layer of the conductivity type opposite to the well diffusion layer formed therein. A thick oxide film of a specific length is grown at a specific distance from the edge of the low concentration diffusion layer, and a gate is formed on the thick oxide film. At the end of the thick oxide film forming the electrode, from one end closer to the low concentration diffusion layer to the high concentration diffusion layer in the low concentration diffusion layer, the diffusion depth is shallower than the diffusion depth of the low concentration diffusion layer. Another low concentration diffusion layer is formed, source and drain diffusion layers are formed so as to have an inverted symmetrical structure around the center of the gate electrode, and the high concentration diffusion layer on the source side and the gate electrode are connected. A high-voltage pulse noise absorbing element, characterized in that the withstand voltage output terminal is used as a high-voltage power supply terminal having a fixed potential, and the electrode from the high concentration diffusion layer on the drain side is used as a high-voltage power supply terminal.