JPH0320437U - - Google Patents
Info
- Publication number
- JPH0320437U JPH0320437U JP7935889U JP7935889U JPH0320437U JP H0320437 U JPH0320437 U JP H0320437U JP 7935889 U JP7935889 U JP 7935889U JP 7935889 U JP7935889 U JP 7935889U JP H0320437 U JPH0320437 U JP H0320437U
- Authority
- JP
- Japan
- Prior art keywords
- groove
- aluminum nitride
- bonded
- silicon chip
- nitride substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Wire Bonding (AREA)
- Die Bonding (AREA)
Description
第１図はこの考案の一実施例を示す厚膜混成集
積回路装置の構成断面図、第２図は従来の厚膜混
成集積回路装置の構成断面図である。 図において、１……シリコントランジスタチツ
プ、２……窒化アルミＡｌＮ基板、２ａ……凹溝
、３……金線、４……Ａｇ系導体、５……Ａｕペ
ースト、６……放熱板、７……接着半田である。
なお、各図中の同一符号は同一または相当部分を
示す。
積回路装置の構成断面図、第２図は従来の厚膜混
成集積回路装置の構成断面図である。 図において、１……シリコントランジスタチツ
プ、２……窒化アルミＡｌＮ基板、２ａ……凹溝
、３……金線、４……Ａｇ系導体、５……Ａｕペ
ースト、６……放熱板、７……接着半田である。
なお、各図中の同一符号は同一または相当部分を
示す。
Claims (1)
- 窒化アルミ基板に凹溝を形成し、この凹溝内に
シリコンチツプをＡｕペーストにより接着し、前
記窒化アルミ基板を放熱板上に接着し、さらに、
前記シリコンチツプに所要のワイヤボンデイング
を施したことを特徴とする厚膜混成集積回路装置
。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7935889U JPH0320437U (ja) | 1989-07-04 | 1989-07-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7935889U JPH0320437U (ja) | 1989-07-04 | 1989-07-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0320437U true JPH0320437U (ja) | 1991-02-28 |
Family
ID=31623446
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7935889U Pending JPH0320437U (ja) | 1989-07-04 | 1989-07-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0320437U (ja) |
-
1989
- 1989-07-04 JP JP7935889U patent/JPH0320437U/ja active Pending