JPH03220712A - Wire bonding structure - Google Patents

Wire bonding structure

Info

Publication number
JPH03220712A
JPH03220712A JP2016858A JP1685890A JPH03220712A JP H03220712 A JPH03220712 A JP H03220712A JP 2016858 A JP2016858 A JP 2016858A JP 1685890 A JP1685890 A JP 1685890A JP H03220712 A JPH03220712 A JP H03220712A
Authority
JP
Japan
Prior art keywords
connection point
capacitor
bonding
bonding connection
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2016858A
Other languages
Japanese (ja)
Inventor
Akira Akisawa
秋沢　章
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2016858A priority Critical patent/JPH03220712A/en
Publication of JPH03220712A publication Critical patent/JPH03220712A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/328—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by welding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/758—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked discrete passive device
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

PURPOSE:To enlarge the thickness of a chip capacitor to be placed and to improve moisture resistance by providing a first (pole) bonding connection point at a circuit board placing electrode land and a second (stitch) bonding connection point at the electrode side of the capacitor. CONSTITUTION:In a wire bonding structure of a transfer molding hybrid integrated circuit in which a lead frame having a circuit board 1 for placing electric components including semiconductor, a chip capacitor 2 on a metal island 4 is resin-sealed, a first (pole) bonding connection point 5a is provided at the island 4 side, and a second (stitch) bonding connection point 5b is provided at the electrode 3 side of the capacitor 2. In this case, the height of the capacitor 2 of a bonding gold wire 5 is suppressed to a low value to be advantageous for the upper limit in the thickness of a sealing resin package 8. Thus, the thickness of the capacitor can be increased to improve moisture resistance.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はワイヤボンディング構造体に関し、特にチップ
コンデンサの電極と搭載電極ランドとをワイヤを使用し
てネールヘッド金ワイヤボンディングで接続するワイヤ
ボンディング構造体に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a wire bonding structure, and particularly to a wire bonding structure in which the electrode of a chip capacitor and a mounting electrode land are connected by nail head gold wire bonding using a wire. Regarding the body.

〔従来の技術〕[Conventional technology]

第３図に示すように、従来、ネールヘッド金ワイヤボン
ディングによりチップコンデンサの電極３と搭載電極ラ
ンド４とを接続する場合はチップコンデンサの電極３側
に１ｓｔ（ボール）ボンディング接続点５ａを、搭載電
極ランド４側に２ｎｄ（ステッチ）ボンディング接続点
５ｂを設けていた。As shown in FIG. 3, conventionally, when connecting the electrode 3 of a chip capacitor and the mounting electrode land 4 by nail head gold wire bonding, a 1st (ball) bonding connection point 5a is mounted on the electrode 3 side of the chip capacitor. A 2nd (stitch) bonding connection point 5b was provided on the electrode land 4 side.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来のチップコンデンサ搭載のワイヤボンディ
ング構造体は、チップコンデンサの電極と搭載電極ラン
ドとをボンディングワイヤにより接続する方法において
、チップコンデンサの電極側は１ｓｔ（ボール）ボンデ
ィング接続点、搭載電極ランド側は２ｎｄ　（ステッチ
）ボンディング接続点になっているためチップコンデン
サ電極側の１ｓｔ　（ボール）ボンディングワイヤが封
止樹脂パッケージ厚上限に対し余裕がなく、搭載チップ
コンデンサの厚みが限られ又、耐湿性についても不利で
あるという欠点がある。In the above-described conventional wire bonding structure mounted with a chip capacitor, in the method of connecting the electrode of the chip capacitor and the mounting electrode land using a bonding wire, the electrode side of the chip capacitor is the 1st (ball) bonding connection point, and the mounting electrode land side is the 1st (ball) bonding connection point. Since this is the 2nd (stitch) bonding connection point, there is no margin for the 1st (ball) bonding wire on the chip capacitor electrode side with respect to the upper limit of the thickness of the encapsulating resin package, and the thickness of the mounted chip capacitor is limited. It also has the disadvantage of being disadvantageous.

本発明の目的は、搭載チップコンデンサの厚みを拡大で
き又、耐湿性の高いチップコンデンサのワイヤボンディ
ング構造体を提供することにある。An object of the present invention is to provide a wire bonding structure for a chip capacitor that can increase the thickness of a mounted chip capacitor and has high moisture resistance.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、金属のアイランドに半導体及びチップコンデ
ンサを含む電気部品を搭載した回路基板を有するリード
フレームを樹脂封止してなるトランスファモールド型混
成集積回路のワイヤボンディング構造体において、搭載
電極ランド側にｌ５ｔ（ボール）ボンディング接続点を
、前記チップコンデンサの電極側に２ｎｄ　（ステッチ
）ボンディング接続点を有している。The present invention relates to a wire bonding structure for a transfer mold type hybrid integrated circuit in which a lead frame having a circuit board on which electrical components including semiconductors and chip capacitors are mounted on a metal island is sealed with a resin, and the wire bonding structure is provided on the mounting electrode land side. A 15t (ball) bonding connection point is provided on the electrode side of the chip capacitor, and a 2nd (stitch) bonding connection point is provided on the electrode side of the chip capacitor.

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.

第１図は本発明の一実施例の要部平面図、第２図は第１
図のＡ−Ａ′線断面図である。FIG. 1 is a plan view of essential parts of an embodiment of the present invention, and FIG.
It is a sectional view taken along the line AA' in the figure.

第１図及び第２図に示すように、回路基板１の搭載電極
ランド４にチップコンデンサ２を接着剤６で固定し、チ
ップコンデンサの電極３と搭載電極ランド４をとボンデ
ィング金ワイヤ５て接続する。As shown in FIGS. 1 and 2, the chip capacitor 2 is fixed to the mounting electrode land 4 of the circuit board 1 with an adhesive 6, and the electrode 3 of the chip capacitor and the mounting electrode land 4 are connected using a bonding gold wire 5. do.

このとき、搭載電極ラン１〜４側は、ネールヘッド金ワ
イヤホンティングの１ｓｔ（ボール）ボンディング接続
点５ａとチップコンデンサの電極３側は、２ｎｄ　（ス
テッチ）ボンデインク接続点とする。At this time, the mounting electrode runs 1 to 4 side are the 1st (ball) bonding connection point 5a of the nail head gold wire fonting, and the chip capacitor electrode 3 side is the 2nd (stitch) bonding connection point.

これ以外の構造は、第３図に示す従来の混成集積回路の
構造と同しである。The structure other than this is the same as that of the conventional hybrid integrated circuit shown in FIG.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、回路基板の搭載電極ラン
ド側に１ｓｔ　（ボール）ボンディング接続点を、チッ
プコンデンサの電極側には２ｎｄ（ステッチ）ボンディ
ング接続点とすることにより、ボンディング金ワイヤが
チップコンデンサの電極面よりの高さが従来構造に比べ
て低くおさえられ、封止樹脂パッケージ厚上限に対し有
利となり、チップコンデンサ厚が拡大でき又、耐湿性が
向上できる効果がある。As explained above, the present invention provides a first (ball) bonding connection point on the mounting electrode land side of the circuit board and a second (stitch) bonding connection point on the electrode side of the chip capacitor, so that the bonding gold wire can be attached to the chip. The height of the capacitor above the electrode surface is kept lower than that of the conventional structure, which is advantageous in terms of the upper limit of the thickness of the sealing resin package, allowing for an increase in the thickness of the chip capacitor and improved moisture resistance.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明の一実施例の要部平面図、第２図は第１
図のＡ−Ａ’線断面図、第３図は従来のワイヤボンディ
ング構造体の一例の要部断面図である。 １・・・回路基板、２・・・チップコンデンサ、３・・
チップコンデンサの電極、４・・・搭載電極ランド、５
・・・ボンディング金ワイヤ、５ａ・・・１ｓｔ（ボー
ル〉ボンディング接続点、５ｂ・・・２ｎｄ　（ステッ
チ）ボンディング接続点、６・・・接着剤、７・・・外
部リード、８・・・封止樹脂体。FIG. 1 is a plan view of essential parts of an embodiment of the present invention, and FIG.
FIG. 3 is a cross-sectional view of a main part of an example of a conventional wire bonding structure. 1... Circuit board, 2... Chip capacitor, 3...
Chip capacitor electrode, 4... Mounted electrode land, 5
...Bonding gold wire, 5a...1st (ball) bonding connection point, 5b...2nd (stitch) bonding connection point, 6...Adhesive, 7...External lead, 8...Sealing Resin stopper body.

Claims (1)

【特許請求の範囲】[Claims] 　金属のアイランドに半導体及びチップコンデンサを含
む電気部品を搭載した回路基板を有するリードフレーム
を樹脂封止してなるトランスファモールド型混成集積回
路のワイヤボンディング構造体において、搭載電極ラン
ド側に１ｓｔ（ボール）ボンディング接続点を、前記チ
ップコンデンサの電極側に２ｎｄ（ステッチ）ボンディ
ング接続点を有することを特徴とするワイヤボンディン
グ構造体。In a wire bonding structure for a transfer mold type hybrid integrated circuit, which is formed by resin-sealing a lead frame having a circuit board on which electrical components including semiconductors and chip capacitors are mounted on a metal island, a 1st (ball) is placed on the mounting electrode land side. A wire bonding structure characterized in that a bonding connection point has a 2nd (stitch) bonding connection point on an electrode side of the chip capacitor.
JP2016858A 1990-01-25 1990-01-25 Wire bonding structure Pending JPH03220712A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2016858A JPH03220712A (en) 1990-01-25 1990-01-25 Wire bonding structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2016858A JPH03220712A (en) 1990-01-25 1990-01-25 Wire bonding structure

Publications (1)

Publication Number Publication Date
JPH03220712A true JPH03220712A (en) 1991-09-27

Family

ID=11927916

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016858A Pending JPH03220712A (en) 1990-01-25 1990-01-25 Wire bonding structure

Country Status (1)

Country Link
JP (1) JPH03220712A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2894952A4 (en) * 2012-09-07 2017-01-25 Mitsubishi Electric Corporation Power semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2894952A4 (en) * 2012-09-07 2017-01-25 Mitsubishi Electric Corporation Power semiconductor device

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