JPH03220727A - semiconductor equipment - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a semiconductor device comprising a combination of a transistor and an avalanche diode.

[Conventional technology]

FIG. 2 is an equivalent circuit diagram showing a conventional semiconductor device, in which (T) is a transistor (1).

(2) and (3) are the collector, base, and emitter of this transistor (T), respectively. (^D) is an avalanche diode whose cathode and anode are the collector (1) and base (1) of the transistor (T), respectively.
2).

FIG. 3 is a cross-sectional view showing a conventional semiconductor device, in which (5) is a first semiconductor layer of a first conductivity type with a high impurity concentration, such as an N4 layer, which makes an ohmic connection with the conductor of the collector (1). (6) is formed on this N4 layer (5) and N
A second semiconductor layer of the first conductivity type and having a low impurity concentration, for example, an N- layer, which forms a collector region together with the fourth layer (5), (7) is formed in the - part of this N- layer and (6>), and is a base layer. A third semiconductor layer of the second conductivity type forming a region, for example a P layer, (8
) is a fourth semiconductor layer of high impurity concentration of the first conductivity type forming an emitter region formed in a part of this P layer (7>, for example, an N layer, and (9) is a part of the P layer (7). A semiconductor layer of the first conductivity type formed on the N-layer (6) and forming the cathode region of the avalanche diode (8D), for example the fifth N-layer, and (10) between the P-layers (7). A sixth semiconductor layer of high impurity concentration of the second conductivity type, for example, a P'' layer, is formed on the N layer (9) and forms an anode region of the avalanche diode (80).

A conventional semiconductor device is configured as described above, with a collector
When an inductive load (not shown) such as a coil or motor is connected to 1〉 and the transistor (T) is switched, a high voltage is generated at the collector (1〉) and emitter (3) due to the induced electromotive force when the current is cut off. In this case, transistors 1 to (T) are working in a biased state (referred to as reverse bias here) where the base current is drawn from the base (2), so the high voltage generated at the collector (1) and emitter (3) If the voltage exceeds the collector-emitter breakdown voltage of the I-transistor (T) and a breakdown occurs between the collector and emitter, the transistor (T) may be destroyed instantly. In the bias state, the base region of the transistor (T) is inactive, so
This is because the breakdown current flowing from the collector (1) to the emitter (3) is concentrated only in a very narrow portion of the transistor chip. Therefore, in the transistor (T) that switches the inductive load as described above, the cathode of the avalanche diode (AD) is connected to the collector (1
), and by connecting the anode to the base (2) and making the breakdown voltage of the avalanche diode (8D) lower than the collector-base breakdown voltage of the transistor (T>), the collector (1) and emitter (3) When a high voltage is generated in the transistor (T), the avalanche diode (8D) breaks down before the transistor (T) breaks down, allowing current to flow into the base (2) of the transistor (T). When the breakdown voltage of the near balancer diode (80) appears, the transistor (T
) appears to break down, but the transistor (
T) itself has a base current supplied to the base (2) via an avalanche diode (AD), and the base (2)
) is active, so collector (1) and emitter (
The current flowing in 3) is distributed throughout the transistor chip. Therefore, the breakdown resistance against inductive loads is dramatically improved.

The avalanche diode (AD) as described above is generally built into a transistor chip. In this case, the avalanche voltage of the avalanche diode (AD) is mainly determined by the concentration of the N layer (9).
Since the impurity concentration of the N layer (9) forming the cathode region of 8D> is high, the avalanche voltage of the N layer (9) and the P layer (10) is higher than that of the N layer (6) and the P layer (7). This is because it is lower than the avalanche voltage of In this way, an avalanche diode (8D) is formed at the junction between the N layer (9) and the P+ layer (10).

[Problem to be solved by the invention]

In the semiconductor device described above, the avalanche voltage of the avalanche diode (AD) is determined by the concentration of the N layer (9), so the temperature coefficient of the avalanche voltage is large, and the temperature coefficient of the avalanche diode (AD) is large. Since the distance to the collector (1) is long, there is a problem in that the dynamic resistance is large.

This invention was made to solve the above-mentioned problems, and its purpose is to reduce the temperature coefficient of the avalanche voltage of an avalanche diode, reduce dynamic resistance, and obtain a semiconductor device that can be easily manufactured. There is.

[Means to solve the problem]

In the semiconductor device according to the present invention, a groove is provided that penetrates the third semiconductor layer and reaches the second semiconductor layer, a semiconductor layer of a second conductivity type with a high impurity concentration is formed around the groove, and the semiconductor The avalanche voltage is determined by the distance from the junction between the second semiconductor layer and the first semiconductor layer.

[For production]

In this invention, the junction of the avalanche diode is formed by connecting the semiconductor layer formed around the groove to the junction of the second semiconductor layer, and when a voltage is applied, the depletion layer of the second semiconductor layer is connected to the first semiconductor layer. It extends toward the semiconductor layer. When the depletion layer of the second semiconductor layer reaches the first semiconductor layer, breakdown occurs, and the voltage at this time becomes an avalanche voltage.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure is a sectional view showing one embodiment of the present invention, and (1) to
(3) and (5) to (8) are exactly the same as the conventional device described above. In FIG. 1, (11) is a groove portion formed to penetrate the P layer (7) forming the base region and reach the N- layer (6) forming the collector region;
is a semiconductor layer of a second conductivity type with a high impurity concentration, for example, a layer 21, which is formed around the groove portion (11).

In the semiconductor device bottomed out as described above, the groove (1
By forming a P+ layer (12) around the avalanche diode (AD), the cathode region of the avalanche diode (AD) is formed by forming a P+ layer (12) around the N- layer (1).
6), the anode region corresponds to 21 layers (12). In other words, the junction of the avalanche diode (8D) has 19 layers (12
) and the N-layer (6). In this case, the avalanche voltage of the PN junction is generally determined by the impurity concentration of the N-layer (6), which has a low concentration.
If the thickness of 7 is sufficiently thick, the collector-base breakdown voltage of the transistor (T) is also
The avalanche voltage of the avalanche diode (AD) is also determined by the impurity concentration of the N- layer (6>), so there is no point in inserting the avalanche diode (AD).However, due to the groove (11), the P+ layer (12) is It will be formed near the layer (5), and the N-layer (6) will be formed near the layer (5).
The depletion layer that spreads is limited.

That is, when a voltage is applied to the avalanche diode (AD), a depletion layer spreads between the 21st layer (12) and the N-layer (6), but since the N-layer (6) has a lower impurity concentration, the 21st layer (
(2) The depletion layer spreads more toward the N- layer (6) than in 2). However, due to the depth of the groove (11), the N- layer (6
), the region where the depletion layer spreads is restricted, and the N− layer (6
) reaches the N゛ layer (5〉), the depletion layer of the N-layer (6) becomes extremely difficult to expand, the electric field strength increases, and the depletion layer of the 21st layer (12) and the N-layer (5) increases. Breakdown occurs at the joint.

In this way, the avalanche voltage of the avalanche diode (AD) can be determined by the depth of the groove (11) and the depth of the P'' layer (6).In the avalanche diode (AD) formed in this way, the avalanche voltage is P The temperature coefficient is small because it is determined by the thickness of the N- layer (6) between the layer (12) and the N-layer (5), and the distance between the junction of the avalanche diode (AD) and the collector (1) is Because it is short, dynamic resistance is small.

In the above embodiment, an NPN transistor is used as the transistor, but it goes without saying that a PNP transistor can also be used, and a similar effect can be obtained even if a transistor has a Darlington connection configuration.

〔Effect of the invention〕

As described in detail above, the present invention provides a groove that penetrates the third semiconductor layer and reaches the second semiconductor layer, and forms a semiconductor layer of a second conductivity type with a high impurity concentration around the groove. death,
Since this semiconductor layer and the second semiconductor layer form an avalanche diode, it is possible to obtain a semiconductor device that has a small temperature coefficient of avalanche voltage, low dynamic resistance, and can be easily manufactured.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing an embodiment of a semiconductor device according to the present invention, FIG. 2 is an equivalent circuit diagram of a conventional semiconductor device, and FIG. 3 is a sectional view showing a conventional semiconductor device. (5) is the N'' layer as the first semiconductor layer, (6) is the second
(7) is a P layer as a third semiconductor layer, (8) is an N+ layer as a fourth semiconductor layer,
(11) is a groove portion, and (12) is a 14-layer semiconductor layer. In each figure, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] a first semiconductor layer of a first conductivity type with a high impurity concentration; a second semiconductor layer of a first conductivity type with a low impurity concentration formed on the first semiconductor layer; a third semiconductor layer of a second conductivity type formed in a part of the third semiconductor layer; a fourth semiconductor layer of a high impurity concentration of a first conductivity type formed in a part of the third semiconductor layer; A semiconductor device comprising: a groove extending through the semiconductor layer to the second semiconductor layer; and a semiconductor layer of a second conductivity type with high impurity concentration formed around the groove.