JPH03285331A - Formation of thin film and manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To fill completely a hole with a metal film and to form a thin film into one, which is never peeled by a stress and is superior in adhesion, by a method wherein the thin film, which is substituted for the metal film, is formed on a wiring metal film by a CVD method. CONSTITUTION:A thin film 3 for substitution use is deposited on a wiring metal film 2 formed on an Si substrate 1. Moreover, the films 3 and 2 are simultaneously etched using a photoresist as a mask. Then, an insulating film 5 is formed, the film 5 is etched using a photoresist as a mask and a via hole 6 is formed. Then, a W film 7 is formed by a selective CVD method. Thereby, the film 3 formed on the film 2 is substituted for the film 7, the film 7 is formed into an inverted T-shaped form by an action of encroachment and a peeling of the film 7 from the film 5 due to a stress can be dissolved. Moreover, as a base material to have most an effect on the selective CVD method is always the film 3, the thin film 3 can be always formed on the same condition even if the film 2 which is a base of the film 3 is any wiring material.

Description

[Detailed description of the invention]

[Industrial Application Field] The present invention relates to a method of forming a thin film by chemical vapor deposition (hereinafter abbreviated as CVD) and a method of manufacturing a semiconductor device.

[Conventional technology]

2. Description of the Related Art Conventionally, when manufacturing semiconductor devices, a wiring metal film has been formed by filling a hole in an insulating film with a metal such as tungsten (W) using a CVD method. In this case, there was a significant difference in the state of metal filling depending on the surface state of the insulating film and the material of the bottom of the hole. In order to eliminate such dependence on the base material, for example,
206853. The method described in JP-A No. 62-243326 was carried out. In this method, a hole is formed in the #4A edge film of the sample, then a silicon film is formed, and a metal film is formed by CVD with the silicon film on the sample surface. There is also a method of forming a silicon thin film on aluminum (A[) wiring, as described in Japanese Patent Laid-Open No. 63-88845. This method is to prevent the occurrence of hillocks on AQ due to heat treatment, and silicon on AQ is lubricated during heat treatment.
When the heat treatment is finished, the AQ wiring becomes an AQ-Si alloy wiring, and the silicon thin film on the AQ disappears.

[Problem to be solved by the invention]

The conventional method of forming a silicon film after forming a hole in the insulating film of the sample, and forming a metal film by CVD method with the silicon film on the sample surface, is difficult because if the diameter of the hole becomes minute, the silicon film formed Due to the deterioration of the covering shape at the step part, even if a metal film is subsequently formed using the CVD method, the hole cannot be completely filled, and an increase in contact resistance is inevitable6. in,
Or gold KE II' using silicon film and CVD method;
There is a problem in that there is a high possibility of peeling occurring due to stress between the parts. There is also a method of forming a silicon thin film on the AQ wiring to prevent the occurrence of AQ hillocks due to heat treatment, but there is a problem that there is a high possibility that silicon will diffuse into the AQ during the heat treatment and the surface condition will deteriorate significantly. be. The purpose of the present invention is to provide a method for forming a thin film that completely fills holes with a metal film regardless of the underlying material of the sample or its surface condition, and has excellent adhesion without peeling due to stress, and for manufacturing a semiconductor device. The purpose is to provide a method. [Means for Solving the Problems 1] The above object is achieved by forming a thin film to be replaced with metal by CVD on a wiring metal film in a semiconductor device having a multilayer wiring structure.

[Function] When a metal film is formed using the CVD method, the base material of the sample or its surface condition greatly influences the shape of the metal film covering the stepped portion. In particular, the formation of a metal film using the selective CVD method strongly depends on the underlying material and surface condition. Also, depending on the difference in the base material, select C.
The conditions for forming a metal film using the VD method vary widely. As shown in FIG. 1, the present invention involves depositing a replacement thin film 3 on a wiring metal film 2 (FIG. 1a) formed on a Si substrate 1 (FIG. 1a), and then using a photoresist as a mask to deposit the replacement thin film 3 (FIG. 1a). The thin film 3 for wiring and the metal wiring film 2 are etched at the same time (FIG. 1C). Next, an insulating film 5 is formed, and the insulating film is etched using a photoresist as a mask to form a via hole 6 (FIG. 1d). Next, a W film 7 is formed by selective CVD method (FIG. 1). e). As a result, the replacement thin film 3 formed on the wiring metal film 2 is replaced by the W film, and the W film 7 becomes an inverted T-shape due to the effect of encroachment, so that peeling from the MM thin film due to stress can be eliminated. Furthermore, since the underlying material that has the most influence on the selective CVD method is always the replacement thin film 3, the thin film can always be formed under the same conditions no matter what wiring material the underlying wiring metal film 2 is made of. The replacement thin film 3 may be, for example, a polycrystalline Si film or a non-quality Si film.
It is a thin film that is replaced with metal by the CVD method such as a film, and W
Membrane 7 contains WF as a reactive gas. etc. are used. Furthermore, the W film 7 can be replaced with other high melting point metals such as Mo and Ti, or low resistance metals such as AQ. In this case each M OF B r T x Cl 4 ! A
A reactive gas such as Q(CHl) is used. In addition, the reaction temperature varies depending on the combination of reactive gas and carrier gas, for example, 250-65
Around 0℃, M o F, ・H, 200-500℃
That's about it. The deposition pressure can be about 0.1 to 100 Pa. The preferred deposition pressure varies depending on the combination of reactive gas and carrier gas and the reaction temperature, and is, for example, 30 Pa or less for 1 MoF and .H2. The above reactive gas, reaction temperature, deposition pressure, etc. are conventional CV
The values of the reactive gas, reaction temperature, deposition pressure, etc. obtained by method D may be used as they are in the present invention. [Example] The present invention will be explained in detail below. <Example 1> FIG. 2 is a schematic diagram showing the film deposition process by the selective CVD method of the present invention. As shown in FIG. 2(a), a laminated film of a wiring metal film 2 and a replacement thin film 3 is formed in a desired pattern on a Si substrate 1,
A sample is used in which an insulating film 5 is deposited thereon, etched into a desired pattern, and via holes 6 are formed. Next, a W film 7 is formed by the selective CVD method according to the present invention. The initial process of depositing the W film 7 is as shown in FIG. 2(b).
The W film 7 begins to slightly dig into the replacement thin film 3. Furthermore, encroachment of the W film 7 causes lateral encroachment. When the formation of the W film 7 is continued, as shown in FIG. 2(c), a thin film 3 for replacing the W film 7
The encroachment grows, and the lateral elongation due to encroachment also increases. Further, when the formation of the W film 7 is continued, the replacement thin film 3 is completely replaced by the W film 7, as shown in FIG. It can be resolved. Also,
Since the adhesion between the W film 7 and the wiring metal film 2 is good, contact resistance can be reduced. The conditions for forming the W film 7 were as follows: 1. WF was used as the reactive gas, SiH4 was used as the carrier gas, and the deposition pressure was 20 Pa.
The reaction temperature was 300°C. Conventionally, as shown in FIG.
After forming and etching into the desired pattern, #fA
A border film 5 is formed, a via hole 6 is opened, and a W film 7 is formed using this sample by the CVD method. By using this method, the W film 7 can be formed by the CVD method without depending on the material of the wiring metal film 2. However, W film 4
Since it is easily oxidized, it is difficult to perform pretreatment when forming the W film 7 by the CVD method. Furthermore, since there are a plurality of interfaces of interconnect metals made of different materials between the interconnect metal film 2 and the W film 7, there are concerns about peeling from the interface and increased resistance at the interface. <Example 2> FIG. 3 is a schematic diagram showing a film deposition process by the entire surface CVD method of the present invention. As shown in FIG. 3(a), a laminated film of a wiring metal film 2 and a replacement @ film 3 is formed in a desired pattern on a Si substrate 1,
A sample is used in which an insulating film 5 is deposited thereon, etched into a desired pattern, and via holes 6 are formed. Next, wHg7 is formed by the entire surface CVD method according to the present invention. The initial process of deposition of the WH film 7 is shown in FIG. 3(b), as the W film 7 is formed on the entire surface of the sample and at the same time begins to slightly penetrate into the replacement thin layer 3. Moreover, wl
Lateral encroachment due to the encroachment of the desert 7 also occurs. When the formation of the W film 7 is further continued, as shown in FIG. 3(c), the Wl pattern 7 digs into the replacement thin film 3, and the lateral elongation due to encroachment also becomes more severe. When the formation of the WIG arm 7 is further continued, the replacement film 3 is completely replaced with the W film 7, as shown in FIG. 73(d). By making the W film 7 thicker than the radius of the via hole 6, the via hole 6 is completely filled with the W film 7, and the sample surface can be flattened. Furthermore, the W film 7 is of a type that goes under the insulating film 5,
It is possible to eliminate peeling caused by stress. Also, W
Since the adhesion between the film 7 and the wiring metal film 2 is good, contact resistance can be reduced. <Example 3> Next, FIG. 5, which shows an example in which a semiconductor device was manufactured according to the present invention, is a cross-sectional view of an element showing the manufacturing process. The surface of the N'Si substrate 101 is oxidized to form Si0. A layer 102 is formed, and this SiO□ layer 102 is etched using a photoresist mask to form a desired pattern. Using this pattern as a mask, impurity doping and impurity diffusion are performed to form a P-well layer 103 (FIG. 5a). ). After removing the Si02 layer 102 and forming a surface oxide film 104 on the substrate surface for stabilization, and then forming a Si, N, film 105, etching is performed using a photoresist pattern 106 to obtain a desired pattern, and then A photoresist 106' pattern is formed (FIG. 5b). Two layers 107 are formed by impurity doping using these patterns as masks, and photoresist patterns 106,
After removing 106', field oxidation is performed to
N, remove the film 105 and perform gate oxidation (FIG. 5C)
). A polycrystalline Si film 108 with a thickness of 0.3 μm is formed and etched into a desired pattern using a photoresist mask (FIG. 5d). Next, If! A border film 110 is formed, a desired pattern is formed using a photoresist mask, and impurity doping and diffusion are performed using the insulating film 110, polycrystalline Si film 108, etc. as a mask to form a P+ layer 109 (FIG. 5e). The P+ layer 1 is formed in the same manner as above except for the insulating film 110.
An insulating film 111 is formed to cover the N+ layer 112.
(Fig. 5f). A first interlayer insulating film 113 of phosphor glass (PSG) is formed to a thickness of about 0.6 μm over the entire surface except for the insulating film 111, and via holes are formed at desired positions (FIG. 5g). Note that the steps up to this point are the same as the conventional method. Next, a W film 114 for the first layer wiring is formed to a thickness of about 0.5 μm using sputtering and CVD, and a polycrystalline Si film 1 is formed on it.
15 with a thickness of about 50 nm (FIG. 5h). Next, using the photoresist as a mask, the W film 114 and the polycrystalline 5i 11115 are simultaneously etched into a desired pattern. Next, the second interlayer insulating film 116 is formed to a thickness of 0.6 μm.
Then, using the photoresist as a mask, the second interlayer insulating film 116 is etched to form a via hole 117 (FIG. 5i). Next, using the selective CVD method according to the present invention, the via hole 1 is
A W film 118 is formed on 17. Note that at this time, the polycrystalline Si film 115 at the bottom of the via hole 117 is replaced with a W film 118, and the W film 118 and the W film 114 of the first layer wiring can be directly bonded. Furthermore, when the polycrystalline Si film 115 is replaced with the W film 118, the W film 118 expands in the lateral direction due to encroachment, resulting in a shape that slightly sinks under the second interlayer insulating film 116. The adhesion between the eye wiring and the W film 114 can be strengthened. Next, the second layer wiring ^fl@1
19 is formed to a thickness of 500 nm, a polycrystalline Si film 120 is further formed thereon to a thickness of about 50 nm, and the A Q [119 and the polycrystalline 51wAl2O are simultaneously etched into a desired pattern using a photoresist as a mask. (Figure 5j). Furthermore, after forming the third M fiber J# film 121 with a thickness of approximately 0.9 μm, it is etched into a desired pattern using a photoresist as a mask, and is then etched using the selective CVD method according to the present invention described above, in the same manner as the method described in 2. A W film +22 is formed. Next, the third layer wiring AQ11!1li123 was made to a thickness of 0.9 μm.
Then, using photoresist as a mask, a desired pattern is etched (FIG. 5k).

【Effect of the invention】

According to the present invention, when filling a via hole with metal by the CVD method, by forming a thin film that can be replaced with a metal such as a polycrystalline Si film or an amorphous Si film on the underlying wiring film, the CVD method can be used. When filling the via hole with metal, the thin film is replaced with metal, making it possible to perform excellent metal filling. Also, in metal embedding by CVD method. Metal embedding can always be performed under constant conditions without depending on the material of the underlying wiring metal film, which is one of the most important parameters. Furthermore, the shape of the metal film coated by the CVD method of the present invention is effective in preventing peeling due to stress.

[Brief explanation of the drawing]

FIG. 1 is a schematic cross-sectional view for explaining a thin film forming method according to an embodiment of the present invention, and FIGS. 2 and 3 are selected CVs of the present invention.
FIG. 4 is a schematic cross-sectional view illustrating a film deposition process using the D method. FIG. 4 is a schematic cross-sectional view illustrating a thin film forming method using the conventional selective CVD method. FIG. It is a sectional view showing a manufacturing process. Explanation of symbols 1... Si substrate, 2... Wiring metal film, 3... Substitution thin film, 4... W film, 5... Insulating film, 6... Via hole, 7... W film, 101...Si substrate, 102
...Si08 layer, 103...P well layer, 104.
・Surface oxide film, 105...Si□N4 film, 106.1
06'...Photoresist, 107...2 layers, 10
8... Polycrystalline Si film, 109... P+ layer, 110...
... Insulating film, 111... Insulating film 5112... N+ layer, 113... First interlayer fibrous film, 114... W film, 11
5... Polycrystalline Si film, 116... Second interlayer insulating film,
117... Via hole, 118... W film, 119...
...A [membrane, 120...polycrystalline Si film, 121...Figure 2 (face CC) 2 Hi'γ hole 7 W call 3 s massage 7 shi 3/month 4 books■ 3 Tsuka Diagram ((L) /ρZ ) (2) Diagram (Children and small ■ 5 Diagram (4) Shi) (A) //6 No. z, 1 question g Denyu 23 AJ role

Claims (7)

[Claims] 1. 1. A method for forming a metal film by chemical vapor deposition, which comprises forming a thin film that can be substituted for metal by chemical vapor deposition on a base wiring metal film of a semiconductor device having a multilayer wiring structure. 2. In the method according to claim 1, when forming a metal film in the via hole by chemical vapor deposition (CVD), the thin film on the lower wiring metal film is replaced with the metal film by CVD. Characteristic thin film formation method. 3. A method for forming a metal film by chemical vapor deposition, which comprises a step of forming a thin film that can be replaced with metal by chemical vapor deposition on a base wiring metal film of a semiconductor device having a multilayer wiring structure. manufacturing method. 4. In the method according to claim 3, a step of forming a lower metal wiring film, a step of forming a thin film that can be replaced with a metal other than the lower wiring metal film, and forming a desired pattern on the thin film, After that, there is a step of depositing an insulating film to form a via hole, and a step of forming a via hole by chemical vapor deposition (CV).
D) A method for manufacturing a semiconductor device, comprising the step of forming a metal film by a method. 5. The method according to claim 4 is characterized in that when forming a metal film in the via hole by chemical vapor deposition (CVD), the thin film on the lower wiring metal film is replaced with a metal film formed by CVD. A method for manufacturing a semiconductor device. 6. In the method according to claim 4 or 5, the metal film formed by chemical vapor deposition (CVD) is
A method for manufacturing a semiconductor device, characterized in that the film is a high melting point metal film such as tungsten, molybdenum, titanium, tantalum, or the like, or a low resistance metal film such as aluminum, copper, etc. 7. In the method according to claims 3 to 6, the thin film to be replaced with metal is a thin film that can be replaced with metal as described in claim 6, such as a polycrystalline Si film or an amorphous Si film. A method for manufacturing a semiconductor device, characterized in that: