JPH034043Y2 - - Google Patents

Description

[Detailed description of the invention] <Technical field> This invention relates to a flat package that encapsulates a chip such as a multi-input/output integrated circuit. This relates to improvements aimed at reducing area.

<Prior Art> Generally, the number of input/output pads of a semiconductor device is determined by the function, application, etc. of the semiconductor device, and is not constant. On the other hand, standard packages for semiconductor devices have fixed case dimensions, number of connection pins, spacing between connection pins, etc. When selecting a package to enclose a semiconductor device, it is necessary to If a standard package with connection pins was selected and the number of connection pins in the selected standard package was greater than the number of input/output pads, the extra connection pins were designated as NC (non-connected) during bonding.

For example, the standard package selection process can be carried out by
An example of a display driver semiconductor device having 32 input/output pads will be explained as follows. First, by selecting an available dual-in-line standard package (hereinafter referred to as DIP standard package), the DIP standard package shown in FIG. 5 can be used, and the planar shape of the package body 11 is long. Side D11,D
12 is standardized to be 53.1 mm, short sides E11 and E12 are 15.24 mm, and both long sides D11 and D12 are standardized.
There are 20 connecting pins protruding along each side.

On the other hand, when selecting a quad-type standard flat package that can be used, the standard package shown in FIG. 6 can be used, and the number of connection pins 14 of this standard package is as follows:
There are 11 wires on each side D20, a total of 44 wires,
It is about the same level as the DIP standard package shown in Figure 5, but
Since the dimension of each side D20 is standardized to 14 mm, the mounting area is approximately one-fourth that of a standard DIP package.

<Problems to be solved by the invention> If a usable package is selected from the above DIP standard packages, it will be easy to mount the package on a printed circuit board, and the package will be mounted on the printed circuit board. When laying wiring, the wiring can also be laid in the lower part of the package body 11 (hereinafter referred to as the mounting occupied area), so the entire surface of the printed circuit board can be used effectively. However, since the package body 11 is large, one The area occupied by the package on the printed circuit board (hereinafter referred to as mounting area) is large, and when an electronic device is constructed by mounting a large number of packages on the printed circuit board, there is a problem in that the electronic device becomes larger.

On the other hand, when a usable package is selected from quad standard flat packages, the mounting area of each package body 13 is small, and even if an electronic device is configured by mounting many packages on a printed circuit board, the electronic device However, in such a standardized flat package, the connecting pins 14 are provided protrudingly along the four sides of the package body 13, and the intervals between the connecting pins 14 are extremely narrow. Therefore, when wiring from each connection pin 14, it is not possible to use the mounting area as in the DIP standard package. The disadvantage is that the advantage of reduced mounting area is not fully utilized in multi-input/output applications due to the need for line processing.

<Means and effects for solving the problems> The present invention was developed in view of the problem of an increase in the mounting area when using the DIP standard package mentioned above, and the difficulty of not being able to use the mounting area when using a quad standard flat package. , the connecting pin protruding from at least one side of the standard flat package body is removed, and the wiring in the form of a printed circuit board connected to the other connecting pins is inserted from under the bottom of the package body.
The gist is that it can be connected to an external device by passing under the side.

<Example> Next, an example of this invention will be described below based on the drawings of FIGS. 1 to 4.

Figures 1a, b, and c show the first embodiment, in which the dimensions that define the shape of the rectangular parallelepiped package body 1 are standardized by EIAJ, that is, the long sides D01 and D02 are 20.0 mm, and the short sides are 20.0 mm. Sides E01 and E02 are 14.0
mm and thickness d are selected to be 2.00 mm.
Twenty-four connection pins 2 are provided along both long sides D01 and D02 of the package body 1 so as to protrude toward the bottom surface of the package body.

The flat package shown in the first embodiment is as follows:
By removing all of the connecting pins 2 that protrude toward the bottom of the package along the two opposing sides E01 and E02 of the existing quad-type standard package, we have created a wiring passage area under the bottom of one side E02. The wiring on the printed circuit board toward the remaining connection pins 2 protruding from the other two sides can pass therethrough.

The area occupied by the mounting portion of the package body 1 is approximately one-third that of the DIP standard package shown in FIG.

In use, as shown in Fig. 2, for example, the output wire from the connecting pin 2 is routed under the bottom of the package body so that it runs inside the mounting occupied area, and the wiring pattern toward the terminal L0 is connected to the connecting pin 2. It passes across one side E02 without a blank space and extends toward an external device not shown. In addition, it is possible to connect a part of the connection pin 2 (the upper part in Fig. 2) with, for example, a common line Lc as a control line by straight wiring, which facilitates connection between standard packages. is planned.

Next, FIG. 3 shows a second embodiment of this invention, in which the two short sides E0 shown in the first embodiment are
1, E02, the connection pin 2 that should be arranged on one side E01 is not arranged, and the bottom surface thereof is used as a passage area for the wiring, and the shape and dimensions of the package body 1 are This is similar to that of the first embodiment.

In use, as shown in FIG. 4, the wiring pattern 3' can be extended into the mounting area as in the first embodiment. Furthermore, when the number of control lines increases, for example, a corresponding number of common lines Lc can be connected to the connection pins 2 protruding from the short side E01.

<Effects> As described above, according to this invention, the wiring process for multiple input/output lines can be simplified by configuring a configuration in which connection pins that should be placed on at least one side of an existing standard flat package are not provided. However, it has the advantage that the mounting area in a standard flat package is narrow, and the advantage that the mounting area in a DIP standard package can be used as a wiring pattern forming part.
As a result, an excellent effect is achieved in that the mounting area can be completely reduced.

In addition, during manufacturing, the existing standard dimensions can be used as is, so it is sufficient to simply cut and remove the connecting pins arranged on one side of the package manufactured as a standard product, and the standard package manufacturing equipment,
For example, it is possible to reuse molds, etc., and the addition of manufacturing processes and manufacturing equipment can be made extremely light, which also has the effect of avoiding a significant increase in costs.

[Brief explanation of the drawing]

1 to 4 show an embodiment of this invention. FIG. 1a is a plan view showing the configuration of the first embodiment, FIG. 1b is a side view thereof, and FIG. Another side view, FIG. 2, is a schematic diagram of a wiring pattern for explaining an example of use of the first embodiment, and FIG.
is a plan view showing the configuration of the second embodiment, FIG. 3b is a side view thereof, and FIG. 3c is another side view thereof.
FIG. 4 is a schematic diagram of a wiring pattern for explaining an example of use of the second embodiment. Figures 5 and 6 are diagrams showing the configuration of a conventional standard package.
The figure is a plan view of a DIP standard package, and FIG. 6 is a plan view of a quad-type flat package. 1...Package body, 2...Connection pin, 3,
3'...Wiring pattern, D01, D02...Long side,
E01, E02...Short side.

Claims (1)

[Scope of utility model registration request] In a standard package for a semiconductor device in which a predetermined number of connection pins connected to wiring on a printed circuit board are provided on each of the four sides of a rectangular parallelepiped package body and protrude toward the bottom surface of the package, the pins are provided on two sides of the package body. All of the connecting pins removed are removed, and the bottom surface of one side of the package body from which the connecting pins have been removed is formed as a passage area for wiring on the printed circuit board toward the remaining connecting pins. Packages for semiconductor devices.