JPH0340512B2 - - Google Patents
Info
- Publication number
- JPH0340512B2 JPH0340512B2 JP60060987A JP6098785A JPH0340512B2 JP H0340512 B2 JPH0340512 B2 JP H0340512B2 JP 60060987 A JP60060987 A JP 60060987A JP 6098785 A JP6098785 A JP 6098785A JP H0340512 B2 JPH0340512 B2 JP H0340512B2
- Authority
- JP
- Japan
- Prior art keywords
- silicon nitride
- semiconductor substrate
- nitride film
- layer
- nitride layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
Landscapes
- Recrystallisation Techniques (AREA)
Description
【発明の詳細な説明】
[発明の技術分野]
この発明は半導体基板の製造方法に関し、特
に、シリコン窒化層を内部に有するとともに該シ
リコン窒化層に隣接した不純物拡散層を内蔵する
半導体基板の製造方法に関するものである。[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor substrate, and particularly to a method for manufacturing a semiconductor substrate that has a silicon nitride layer therein and an impurity diffusion layer adjacent to the silicon nitride layer. It is about the method.
[発明の技術的背景とその問題点]
一般に、半導体基板の表面に絶縁層を形成する
ことや表面から内部に向かつて不純物拡散層を形
成することは容易であるが、半導体基板の内部に
絶縁層や不純物拡散層を形成することは容易では
なく、特に、半導体基板の表面から深い位置に埋
没した状態で絶縁層や不純物拡散層を再現性よく
形成することは従来技術では実質的に不可能であ
つた。[Technical background of the invention and its problems] Generally, it is easy to form an insulating layer on the surface of a semiconductor substrate or to form an impurity diffusion layer from the surface inward. It is not easy to form an insulating layer or an impurity diffusion layer, and in particular, it is virtually impossible to form an insulating layer or an impurity diffusion layer with good reproducibility when buried deep from the surface of a semiconductor substrate using conventional techniques. It was hot.
しかしながら、基板表面から深い位置に埋め込
まれた絶縁層や不純物拡散層を有する半導体基板
が最近の半導体装置の発展とともに求められるよ
うになつている。 However, with the recent development of semiconductor devices, there has been a demand for semiconductor substrates having an insulating layer or an impurity diffusion layer buried deep from the surface of the substrate.
[発明の目的]
この発明の目的は、半導体基板の内部に、絶縁
層とそれに隣接する不純物拡散層とを有した半導
体基板を製造する方法を提供することである。[Object of the Invention] An object of the present invention is to provide a method for manufacturing a semiconductor substrate having an insulating layer and an impurity diffusion layer adjacent to the insulating layer inside the semiconductor substrate.
[発明の概要]
この発明による方法は、予めシリコン窒化層の
形成と該シリコン窒化層への不純物導入とを終了
した第一の半導体薄板に第二の半導体薄板を接合
し、次いで熱拡散処理をすることにより、内部に
シリコン窒化層とそれに隣接して不純物拡散層と
を有する半導体基板を製造することを特徴とする
ものである。この発明の方法によれば、基板表面
から深い位置に埋め込まれたシリコン窒化層と不
純物拡散層とを有した半導体基板を再現性よく製
造することができる。[Summary of the Invention] The method according to the present invention involves bonding a second semiconductor thin plate to a first semiconductor thin plate on which a silicon nitride layer has been formed and impurities introduced into the silicon nitride layer, and then thermal diffusion treatment is performed. By doing so, a semiconductor substrate having a silicon nitride layer and an impurity diffusion layer adjacent to the silicon nitride layer is manufactured. According to the method of the present invention, a semiconductor substrate having a silicon nitride layer and an impurity diffusion layer buried deep from the surface of the substrate can be manufactured with good reproducibility.
[発明の実施例]
以下に本発明の方法をシリコン半導体基板の製
造に適用した実施例について添附図面の第1図乃
至第3図を参照しつつ説明する。[Embodiments of the Invention] Examples in which the method of the present invention is applied to manufacturing a silicon semiconductor substrate will be described below with reference to FIGS. 1 to 3 of the accompanying drawings.
第1図A乃至第1図Fは本発明方法をシリコン
半導体基板の製造工程として図示したものであ
る。 FIGS. 1A to 1F illustrate the method of the present invention as a process for manufacturing a silicon semiconductor substrate.
この実施例では、N型の第一のシリコン単結晶
板1の一方の表面に、先ず、減圧CVD法によつ
て第一のシリコン窒化膜(以下にはこれをSiN膜
と略記する)2を第1図Aの如くに形成する。次
に第1図Bに示すように、該SiN膜2に、たとえ
ばイオン注入法等の手段によりGa等のP型不純
物を導入する。ついで第1図Cに示すように、該
第一のSiN膜2の上に更に前記と同じ方法で第二
のSiN膜3を堆積させた後、第1図Dに示すよう
に該第二のSiN膜3の表面を鏡面に仕上げる。こ
の場合、鏡面の表面粗さは500Å以下にするとと
もに該鏡面仕上面を清浄な水で数分程度水洗処理
をする。この脱水は、室温でのスピンナー処理が
適しており、100℃以上の加熱乾燥は避けるのが
よい。それは、次の接合にとつて鏡面に吸着して
いる水分を完全に除去しないことが重要と認めら
れるからである。 In this example, a first silicon nitride film (hereinafter abbreviated as SiN film) 2 is first formed on one surface of a first N-type silicon single crystal plate 1 by low pressure CVD. It is formed as shown in FIG. 1A. Next, as shown in FIG. 1B, a P-type impurity such as Ga is introduced into the SiN film 2 by, for example, ion implantation. Next, as shown in FIG. 1C, a second SiN film 3 is further deposited on the first SiN film 2 in the same manner as described above, and then the second SiN film 3 is deposited as shown in FIG. 1D. Finish the surface of the SiN film 3 to a mirror finish. In this case, the surface roughness of the mirror surface is set to 500 Å or less, and the mirror-finished surface is washed with clean water for several minutes. Spinner treatment at room temperature is suitable for this dehydration, and it is best to avoid heating and drying at temperatures above 100°C. This is because it is recognized that it is important for the next bonding to not completely remove the moisture adsorbed on the mirror surface.
一方、N型の第二のシリコン単結晶板4を準備
し、該シリコン単結晶板4の一方の表面を鏡面仕
上げをする。この場合も第二のシリコン単結晶板
4の鏡面仕上面の表面粗さが500Å以下になるよ
うに研磨するとともにその鏡面状態によつては
H2O2−H2SO4混液、次いでHF液、さらに希HF
液で前処理をし、前記SiN膜の研磨の場合と同様
水洗処理及び脱水処理をしておく。 On the other hand, a second N-type silicon single crystal plate 4 is prepared, and one surface of the silicon single crystal plate 4 is mirror-finished. In this case as well, the mirror-finished surface of the second silicon single crystal plate 4 is polished so that the surface roughness is 500 Å or less, and depending on the mirror-finished state,
H 2 O 2 −H 2 SO 4 mixture, then HF solution, then dilute HF
Pretreatment is performed with a liquid, followed by washing with water and dehydration as in the case of polishing the SiN film.
次に、第二のシリコン単結晶板4の該鏡面を第
一のシリコン単結晶板1の第二のSiN膜3の鏡面
上に密着させつつ200℃以上の温度、好ましくは
1000〜1200℃の温度で熱処理を行つて、第1図E
に示すように、シリコン窒化層5(これは該第一
及び第二のSiN膜2及び3が合体したものであ
る)を介し、2枚のシリコン単結晶板1及び4が
接合された半導体基板6を得る。この場合、両鏡
面の間に異物が介在しない状態で直接密着させる
ことが大切で、クラス1以下の雰囲気中で行なう
のがよい(クラス1は、1ft3中の0.5μmの塵埃が
1個である状態をいう)。 Next, the mirror surface of the second silicon single crystal plate 4 is brought into close contact with the mirror surface of the second SiN film 3 of the first silicon single crystal plate 1 at a temperature of 200° C. or higher, preferably.
After heat treatment at a temperature of 1000 to 1200℃, Fig. 1E
As shown in FIG. 2, a semiconductor substrate has two silicon single crystal plates 1 and 4 bonded to each other via a silicon nitride layer 5 (this is a combination of the first and second SiN films 2 and 3). Get 6. In this case, it is important to make direct contact between the two mirror surfaces without any foreign matter intervening, and it is best to do so in an atmosphere of class 1 or lower (class 1 means that there is only one piece of 0.5 μm dust in 1 ft 3 ). (a certain state).
しかる後、該半導体基板6に約1200℃の高温で
数時間熱拡散処理をすると、第1図Fに示すよう
に、該半導体基板6の内部のシリコン窒化層5の
両側にGaが拡散されてP型の不純物拡散層7が
シリコン窒化層5の両側に形成された半導体基板
6が完成する。 Thereafter, when the semiconductor substrate 6 is subjected to thermal diffusion treatment at a high temperature of about 1200° C. for several hours, Ga is diffused into both sides of the silicon nitride layer 5 inside the semiconductor substrate 6, as shown in FIG. 1F. A semiconductor substrate 6 in which P-type impurity diffusion layers 7 are formed on both sides of the silicon nitride layer 5 is completed.
なお、半導体基板としてシリコン単結晶板で構
成されるものを示したが、これ以外の半導体基板
であつてもよい。また、該シリコン窒化膜への不
純物導入はどのような方法で行つてもよいが、イ
オン注入法を用いれば制御された量でしかも最も
再現性よく不純物拡散層を形成できる。 Note that although a semiconductor substrate made of a silicon single crystal plate is shown, other semiconductor substrates may be used. Further, impurities may be introduced into the silicon nitride film by any method, but by using ion implantation, an impurity diffusion layer can be formed in a controlled amount and with the best reproducibility.
第2図及び第3図は本発明方法を利用して製造
された半導体基板の実施例を示したものである。 FIGS. 2 and 3 show examples of semiconductor substrates manufactured using the method of the present invention.
第2図に示した半導体基板6Aは、シリコン窒
化層5Aを形成し、該シリコン窒化層5AにN型
不純物を導入することにより、該シリコン窒化層
5Aの両側にN型高濃度層の不純物拡散層7Aを
形成したものである。 In the semiconductor substrate 6A shown in FIG. 2, a silicon nitride layer 5A is formed, and an N-type impurity is introduced into the silicon nitride layer 5A, so that an N-type high concentration layer of impurities is diffused on both sides of the silicon nitride layer 5A. This is the layer 7A formed thereon.
また、第3図に示した半導体基板6Bは、第一
の半導体薄板1の一部表面にのみシリコン窒化層
5Aを形成するとともに該シリコン窒化層5Aに
N型不純物を導入することにより、シリコン窒化
層5Aの両側にN型高濃度層の不純物拡散層7A
を形成させたものである。 Further, the semiconductor substrate 6B shown in FIG. 3 is manufactured by forming a silicon nitride layer 5A only on a part of the surface of the first semiconductor thin plate 1 and introducing an N-type impurity into the silicon nitride layer 5A. Impurity diffusion layers 7A of N-type high concentration layer are provided on both sides of layer 5A.
is formed.
[発明の効果]
以上に記載したように、本発明の方法によれ
ば、内部にシリコン窒化層とそれと隣接した不純
物拡散層とを有した半導体基板を製造することが
でき、その結果、従来は製造困難であつた各種の
半導体装置を製造することができるようになつ
た。[Effects of the Invention] As described above, according to the method of the present invention, a semiconductor substrate having a silicon nitride layer and an impurity diffusion layer adjacent to the silicon nitride layer can be manufactured. It has become possible to manufacture various semiconductor devices that were previously difficult to manufacture.
第1図は本発明の方法の主要な工程を半導体の
断面で示した工程図、第2図及び第3図は第1図
の本発明の方法によつて製造しうる半導体基板の
例を示した図である。
1,4……シリコン単結晶板、2,3……シリ
コン窒化膜、5,5A……シリコン窒化層、6,
6A,6B……半導体基板、7,7A……不純物
拡散層。
FIG. 1 is a process diagram showing the main steps of the method of the present invention in cross section of a semiconductor, and FIGS. 2 and 3 show examples of semiconductor substrates that can be manufactured by the method of the present invention shown in FIG. This is a diagram. 1, 4... Silicon single crystal plate, 2, 3... Silicon nitride film, 5, 5A... Silicon nitride layer, 6,
6A, 6B... Semiconductor substrate, 7, 7A... Impurity diffusion layer.
Claims (1)
ン窒化膜を形成する工程と、該第一のシリコン窒
化膜に不純物を導入する工程と、該第一のシリコ
ン窒化膜の表面に第二のシリコン窒化膜を形成す
る工程と、該第二のシリコン窒化膜の表面を鏡面
仕上げする工程と、一方の表面を鏡面仕上げした
第二の半導体薄板の該表面を該第一の半導体薄板
の該第二のシリコン窒化膜上に密着させた状態に
おいて熱処理を行うことにより該第一及び第二の
半導体薄板を接合させて一枚の半導体基板を形成
する工程と、該半導体基板を熱拡散処理すること
によつて該シリコン窒化層の両側に隣接する不純
物拡散層を形成する工程とを含む、シリコン窒化
層を内部に有するとともに該シリコン窒化層に隣
接した不純物拡散層を内蔵する半導体基板の製造
方法。 2 第一のシリコン窒化膜に不純物を導入する工
程が、イオン注入技術により行われる特許請求の
範囲第1項記載の半導体基板の製造方法。[Claims] 1. A step of forming a first silicon nitride film on one surface of a first semiconductor thin plate, a step of introducing an impurity into the first silicon nitride film, and a step of forming the first silicon nitride film. forming a second silicon nitride film on the surface of the film; mirror-finishing the surface of the second silicon nitride film; and polishing the surface of the second semiconductor thin plate with one surface mirror-finished. forming a single semiconductor substrate by bonding the first and second semiconductor thin plates by performing heat treatment while the first semiconductor thin plate is in close contact with the second silicon nitride film; and forming impurity diffusion layers adjacent to both sides of the silicon nitride layer by subjecting the substrate to thermal diffusion treatment, the method includes a silicon nitride layer therein and an impurity diffusion layer adjacent to the silicon nitride layer. A method for manufacturing a semiconductor substrate. 2. The method of manufacturing a semiconductor substrate according to claim 1, wherein the step of introducing impurities into the first silicon nitride film is performed by ion implantation technology.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60060987A JPS61220456A (en) | 1985-03-27 | 1985-03-27 | Manufacture of semiconductor substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60060987A JPS61220456A (en) | 1985-03-27 | 1985-03-27 | Manufacture of semiconductor substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61220456A JPS61220456A (en) | 1986-09-30 |
| JPH0340512B2 true JPH0340512B2 (en) | 1991-06-19 |
Family
ID=13158291
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60060987A Granted JPS61220456A (en) | 1985-03-27 | 1985-03-27 | Manufacture of semiconductor substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61220456A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2703231B2 (en) * | 1987-09-02 | 1998-01-26 | 株式会社東芝 | Method for manufacturing silicon semiconductor substrate |
| EP0545327A1 (en) * | 1991-12-02 | 1993-06-09 | Matsushita Electric Industrial Co., Ltd. | Thin-film transistor array for use in a liquid crystal display |
| DE4423067C2 (en) * | 1994-07-01 | 1996-05-09 | Daimler Benz Ag | Method of manufacturing an insulated semiconductor substrate |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53128285A (en) * | 1977-04-14 | 1978-11-09 | Nec Corp | Semiconductor device and production of the same |
-
1985
- 1985-03-27 JP JP60060987A patent/JPS61220456A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61220456A (en) | 1986-09-30 |
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