JPH0423304B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image pattern reading method suitable for detecting the presence or absence of defects in patterns of photomasks and the like used in the manufacture of integrated circuits.

In general, this type of photomask is made by printing, for example, a pattern of an opaque chrome thin film layer (hereinafter referred to as an image pattern) on a transparent glass plate based on an original drawing (design drawing) (hereinafter referred to as a standard pattern). However, it is necessary to inspect whether the pattern is made according to the standard pattern or whether there are any defects, and there are known inspection methods that use an imaging device including a scanning electron microscope. There is. In this method, the image pattern of the photomask to be inspected is electro-optically read and detected, and the read and detected image signals are binarized for each pixel (for example, opaque areas or black level signals are converted to a numerical value of "1"). , the transparent area or white level signal is converted to a numerical value "0"), and then the video pattern based on this binary signal is inspected to check for defects. It is necessary to binarize to a numerical level, otherwise the accuracy of subsequent inspection will deteriorate and there is a risk of erroneously determining the presence or absence of a defect.

In particular, for video signals with a low S/N ratio, there is a risk that erroneous binarization may be performed due to noise.

Conventionally, in order to solve such problems, S/
In the case of a video signal with a low N, a method is known in which the S/N is improved by repeatedly reading and scanning the same video pattern, capturing images and accumulating the same video signal, and then performing binarization. However, since the image pattern is repeatedly scanned over a wide area in this way,
There were disadvantages such as the extremely long inspection processing time, often requiring several days.

The purpose of the present invention is to eliminate the drawbacks of the above-mentioned prior art,
The present invention relates to a video pattern reading method that quickly removes noise contained in a binarized video signal of a video pattern, thereby making it possible to quickly and accurately inspect defects in the video pattern.

In order to achieve this object, the present invention obtains a video signal by imaging a pattern, converts the pixel signal of the video signal into a temporary binary pixel signal, and synchronizes with the imaging of the pattern. A binarized pixel signal of a standard pattern is obtained, a peripheral area including the border of the pattern (hereinafter referred to as a border surrounding area) is extracted using the binarized pixel signal of the standard pattern, and the temporary binarized pixel signal is extracted. A video pattern reading method that corrects an elementary signal to obtain a regular binary pixel signal, in which, in the boundary surrounding area, for each pixel of interest read from the pattern, the provisional image of the pixel of interest is 2
Compare the digitized pixel signal with the provisional binarized pixel signals of a plurality of picture elements surrounding the pixel of interest, and if they do not match, noise may be included. Correcting the temporary binary pixel signal for the pixel of interest based on the level frequency of the temporary binary pixel signal obtained by repeatedly reading the pixel of interest of the pattern a plurality of times. As a regular binary pixel signal,
In the case of a match, the provisional binary pixel signal of the pixel of interest is set as the regular binary pixel signal, and in areas other than the peripheral area of the boundary, the pixel signal of interest is determined for each pixel of interest read from the pattern. , the provisional binary pixel signal of the pixel of interest and the standard pattern binary pixel signal corresponding to the pixel of interest are compared, and if they do not match, noise may be included. Based on the level frequency of a temporary binary pixel signal obtained by repeatedly reading the pixel of interest in the pattern a plurality of times, a temporary binarized pixel for the pixel of interest is determined Correct the signal and convert it to the normal 2
and in the case of a match, the provisional binary pixel signal of the pixel of interest is used as the regular binary pixel signal to obtain a binary video signal of the pattern. It is characterized by

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the video pattern reading method according to the present invention, in which 1 is an imaging device, 2 is a scanning position control circuit, 3 is a memory, 4 is a binarization circuit, and 5 is a border area. A region extraction circuit, 6 a surrounding pixel reference circuit, 7 a binarization condition determination circuit, 8 a frequency counting circuit, 9 a comparison circuit, and 10 a binarization signal setting circuit.

Next, the operation of this embodiment will be explained.

In the figure, an imaging device 1 images a video pattern (not shown) and generates a video signal representing the video pattern (hereinafter referred to as a video pattern signal). The video pattern signal is supplied to a binarization circuit 4, where it is sampled for each picture element and binarized according to the shading of the video pattern. The binarized video pattern signal from the binarization circuit 4 is
The signal is supplied to a peripheral picture element reference circuit 6, a binarization condition determination circuit 7, and a frequency counting circuit 8.

On the other hand, the memory 3 stores a standard pattern that is the basis of the video pattern imaged by the imaging device 1, and under the control of the scanning position control circuit 2, the video pattern signal is synchronized with the imaging device 1. Similarly, a binarized standard pattern is read out. A video signal representing a standard pattern (hereinafter referred to as a standard pattern signal) is supplied from the memory 3 to a boundary peripheral area extraction circuit 5. The boundary peripheral area extraction circuit 5 forms a signal representing the boundary peripheral area of the standard pattern (hereinafter referred to as peripheral signal) from the standard pattern signal, and supplies this peripheral signal and the standard pattern signal to the binarization condition determination circuit 7. do.

In addition, the "standard pattern boundary" in FIG. 2 refers to the shaded area of the standard pattern P _S , that is,
For example, it refers to the boundary c between area a, which represents white, and area b, which represents black, and the "peripheral area of the standard pattern boundary" is the neighboring area d (shaded area) that includes the boundary c of the standard pattern. .

Then, the peripheral signal is processed by the boundary peripheral region extraction circuit 5.
When the pixel signal of the standard pattern signal supplied to represents a pixel included in the border peripheral area d of the standard pattern (FIG. 2), it is "0";
It is "1" when it represents a picture element not included in the boundary surrounding area d.

The peripheral picture element reference circuit 6 compares each picture element signal of the video pattern signal supplied from the binarization circuit 4 with a plurality of neighboring picture element signals that have already been binarized, and A signal (hereinafter referred to as a reference signal) is generated which is "1" if the signal matches all of the surrounding picture element signals, and which is "0" if at least one of them does not match.

That is, in FIG. 3, the pixel signal for the pixel x on the k-th scanning line is now supplied to the peripheral pixel reference circuit 6 between the k-1st scanning line and the k-th scanning line of the video pattern. Then, this picture element x, the picture element a to the left of picture element x on the k-th scanning line, and the picture element directly above picture element x on the k-1th scanning line. c, and “1” of each picture element signal of picture elements b and d on both sides of picture element c,
The "0" levels are compared, and when all match, the reference signal is set to "1", and when at least one does not match, the reference signal is set to "0".

The binarization condition determination circuit 7 determines each pixel signal of the video pattern signal from the binarization circuit 4 in different ways depending on the peripheral signal from the boundary peripheral area extraction circuit 5.

First, assume that the peripheral signal is "1".

At this time, the picture elements read from the memory 3 are not included in the boundary surrounding area d shown in FIG.
At this time, since the scanning positions of the imaging device 1 and the memory 3 are synchronously controlled by the scanning position control circuit 2, the pixel signals obtained from the imaging device 1 do not represent the boundaries of the video pattern; The video pattern signal from the value converting circuit 4 and the standard pattern signal from the boundary surrounding area extraction circuit 5 are compared for each pixel signal. When the two match, the picture element signal of the video pattern signal at that time is correctly 2.
Binary signal setting circuit 10 as valued pixel signal
At the same time, the scanning position control circuit 2 is operated to move the reading position of the imaging device 1 and memory 3 to the next picture element.

On the other hand, when the two do not match, the picture element signal of the video pattern signal at that time is correctly 2.
This is assumed to have not been converted into a value, because this may be due to a defect in the video pattern, or may be due to noise during reading. Therefore, the binarization condition determination circuit 7 operates the frequency counting circuit 8 and fixes the reading position between the imaging device 1 and the memory 3 by the scanning position control circuit 2.

Next, assume that the peripheral signal is "0".

At this time, the picture elements read from the memory 3 are included in the boundary peripheral area d shown in FIG. By the way, in general, the video pattern read from the imaging device 1 and the standard pattern read from the memory 3 do not completely match, and even a slight error (an error of about ±1 μm based on the standard pattern) may cause problems. It's out of alignment. For this reason, the width of the boundary peripheral area d in FIG. 2 is equal to the width of the boundary c of the standard pattern P _S
The area is centered on , and has a width of 1 μm above, below, left and right.

However, the pixel signal of the video pattern signal at that time may represent the boundary of the video pattern, and for this reason, when comparing the video pattern signal and the standard pattern signal, the pixel signal of each pattern is Even if they are correct, there is a possibility that they will not match.

Therefore, based on the reference signal from the peripheral picture element reference circuit 6, it is determined whether each picture element signal of the video pattern signal from the binarization circuit 4 has been correctly binarized.

That is, when the reference signal is “1”, the third
In the figure, the picture element signal for picture element x matches the respective picture element signals for surrounding picture elements a, b, c, and d, and the picture element signal for picture element x is correct from the correlation of the video pattern. The pixel signal of the video pattern signal from the binarization circuit 4 is supplied to the binary signal setting circuit 10, and the scanning position control circuit 2 operates to perform imaging. The reading position of device 1 and memory 3 is moved to the next picture element.

On the other hand, when the reference signal is "0", the picture element signal for picture element x is at least one of the picture element signals for surrounding picture elements a, b, c, and d in FIG.
For this reason, picture element x may be a boundary, a defect in the image pattern, or
There is a possibility that the pixel signal of pixel x was affected by noise during reading.

Therefore, the binarization condition setting circuit 7 operates the frequency counting circuit 8 and disables the scanning position control circuit 2 to fix the reading positions of the imaging device 1 and the memory 3.

When the frequency counting circuit 8 is started, the binarization circuit 4
Start counting "0" or "1" of the picture element signal of the video pattern signal from . In other words, when the scanning is fixed and the same pixel signal is repeatedly sampled in the binarization circuit 4, binarized, and entered into the frequency counting circuit 8, the binarization level is "1". The number of times (sampling number) and the number of times of binarization that is “0” are counted separately, and the number of times (frequency) of “1” and “0” are counted separately.
The next comparison circuit 9 determines which of the number of times (frequency) exceeds a preset number N (for example, several times) first.
If the first value exceeded is "0", "0" is adopted as the true binary number at that reading position, and if it is "1", "1" is adopted as the true binary number at that reading position, and this is used in the next stage's binary signal setting circuit. 10. in this way,
The reason why we decided to judge the truth or falsity of binary values based on frequency is because the occurrence of noise that causes erroneous signals, and subtle temporal changes in the scanning electron beam or image pattern surface are only temporary and accidental. This is because it is considered to be shorter and less frequent than correct signal output. Also, when the comparison circuit 9 determines that either "0" or "1" is true as described above, it immediately operates the scanning position control circuit 2 to cause the imaging device 1 and memory 3 to move to the next picture. Start raw reading.

Next, specific examples of each circuit shown in FIG. 1 will be explained.

4A and 4B are block diagrams showing a specific example of the boundary surrounding area extraction circuit 5 of FIG. 1.

In FIG. 4A, 11 is a standard pattern signal input terminal from the memory 3, and 12 is a shift register 12, each having a delay time (1H) corresponding to the length of a scanning line (corresponding to the horizontal scanning of a television). ₁ , 12 ₂ , ..., 12 _2o-2 are connected in series, each shift register group 13 has 2n-1 memory cells, and the shift registers 12 ₁ , 12 ₂ , ... ..., 12 _2o-1 and input terminal 1
_{2n− _ _}
This is a local memory composed of one memory. With this configuration, a square local area consisting of a standard pattern having a number of pixels of (2n-1) x (2n-1) in length and width is successively cut out in the local memory 13 in synchronization with scanning. For example, if n = 3, (2n - 1) x (2n
-1) = 5 x 5 = A square area consisting of 25 picture elements is extracted according to the scanning position, and if the width of one picture element is 0.2 μm, this square area is approximately
It becomes 1μm×1μm.

In Figure 4B, 14 is an AND circuit, 15 is
16 is a NOR circuit, and 16 is an OR circuit. Local memory 1
Assuming that the storage cell No. 3 is Pij (i, j = 1 to 2n-1), all the pixel signals stored in the local memory 13 are
Input to AND circuit 14 and NOR circuit 15,
OR the outputs of AND circuit 14 and NOR circuit 15
When input to the circuit 16, the peripheral signal obtained at the output terminal 17 of the OR circuit 16 becomes "1" in the local memory 13 when all the pixels match.
If there is even one difference, it becomes "0".

Therefore, the operation of the boundary surrounding area extraction circuit 5 will now be described with reference to FIG. 5, taking n=2 as an example.

In FIG. 5, a is the boundary of the standard pattern, and the circles are the storage cells Pij of the shift register of the local memory 13 (FIG. 4A) (where i, j=1, 2,
3) indicates the picture element corresponding to the picture element signal stored in
Hereinafter, to simplify the explanation, the picture element stored in the storage cell Pij of the shift register will be expressed as Pij.

Now, as shown in FIG. 5A, when all picture elements Pij are on one side of boundary a, all picture elements Pij
Since they match, the peripheral signal obtained at the output terminal 17 (FIG. 4B) is "1".

Next, the reading position of memory 3 (Figure 1) moves to the right by one picture element, and as shown in Figure 5B, the picture element
When Pi ₁ is on the right side of boundary a, and picture element Pi ₂ and picture element Pi ₃ are on the left side of boundary a, picture element Pi ₁ and
Since the picture elements Pi ₂ and Pi ₃ are naturally different, the output terminal 17
The peripheral signal from is "0".

Furthermore, memory 3 moves the reading position, and the fifth
As shown in Figure C, when picture elements Pi ₁ and Pi ₂ are on the right side of boundary a, and picture element Pi ₃ is on the left side of boundary a, the peripheral signal from output terminal 17 becomes "0". When the reading position further moves, all the picture elements Pij are located on the right side of the boundary a, and the peripheral signal from the output terminal 17 becomes "1" (FIG. 5D).

From the above, since the peripheral signal from the output terminal 17 becomes "0" with a width of two picture elements, as shown in FIG.
is equal to 2 picture elements - 1 = 1 picture element. Generally, the number of picture elements Pij to be stored is (2n-1)×(2n
-1), the width l of the area around the boundary with respect to the boundary a corresponds to (n-1) picture elements.

Although FIG. 6 describes the case where the pattern boundary a is in the vertical direction, the same applies to the case where the pattern boundary is in the horizontal direction, and the number of stored picture elements Pij is (2n- 1)×(2n-1), it is possible to form a border peripheral area with a width of ±(n-1) picture elements relative to the border.

Next, the relationship between the picture elements Pij stored in each shift register (FIG. 4A) of the local memory 13 and the picture elements of the video pattern read by the imaging device 1 will be explained.

Now, as explained with reference to FIG. 5, it is assumed that n=2 and the local memory 13 (FIG. 4A) consists of three shift registers each consisting of three storage cells.
In this case, as explained in FIG. 5, the allowable deviation amount of the video pattern from the standard pattern is ±l,
That is, it is ±1 picture element. That is, in FIG. 5, with respect to the boundary a of the standard pattern, the corresponding boundary of the video pattern is allowed to deviate from b ₁ to b ₂ by one picture element on the left and right of the boundary a.

Therefore, when the picture element Pij is stored in the shift register of the local memory 13 as shown in FIG. must be on the left side of the boundary of the video pattern (hereinafter referred to as boundary b) that corresponds to boundary a of the standard pattern.

However, the picture element Pij stored in the shift register
When the picture element becomes as shown in FIG. 5B, it is unclear on which side of the boundary b the corresponding picture element of the image pattern to be read is located. In particular, when boundary b is b ₁ , which is the maximum distance of one picture element to the left of boundary a,
The picture element must be on the right side of the boundary _b1 .

Next, even if the picture element Pij stored in the shift register becomes as shown in FIG. 5C, it is still unclear which side of the boundary b the picture element is on. When the boundary b is shifted one picture element to the left to the boundary b ₁ , the picture element is on the right side of the boundary b, but when it is shifted to the right to the boundary b ₁ , the picture element is on the left side of the boundary b. It is.

Furthermore, the picture element Pij stored in the shift register
When the picture element becomes as shown in FIG. 5D, the picture element must be on the right side of the boundary b.

From the above, it is understood that any of the picture elements P ₁₂ , P ₂₂ , and P ₃₂ stored in the local memory 13 and the imaging device 1
In order to compare each pixel signal of the video pattern signal from (FIG. 1), the pixels of the standard pattern being read from the memory 3 (FIG. 1) must be identical. Also, in the same way, boundary a (fifth
) is in the horizontal direction, picture elements P ₂₁ ,
Either P ₂₂ or P ₂₃ must be the same as the picture element of the standard pattern being read from the memory 3. Therefore, picture element P ₂₂ and the picture element of the standard pattern being read must be identical.

Generally, the local memory 3 is (2n-1) x (2n-1)
If one picture element is to be memorized, the picture element stored in P _oo must be the same as the picture element of the standard pattern being read. In other words, the imaging device 1
(Fig. 1), the picture element signal for the standard pattern picture element read from the memory 3 (Fig. 1) is simultaneously processed by the boundary surrounding area extraction circuit 5. Local memory 13
It will be stored in the storage cell _Poo of the shift register (FIG. 4A).

In this way, since the boundary surrounding area extraction circuit 5 operates, in FIG. A standard pattern signal that is more temporally advanced than the input terminal 11 of the boundary surrounding area extraction circuit 5 (FIG. 4A)
will be supplied to

Therefore, if we assume that the maximum possible deviation l (Fig. 5) of the image pattern from the standard pattern is 1 μm, and the interval between each pixel is 0.2 μm, a deviation of 5 pixels must be allowed. . Therefore, since n-1=5 ∴n=6, 2n-1=11 and shift register group 1 in FIG. 4A.
2 has 10 shift registers (=2×6−2) connected in cascade, and the local memory 13 uses 11 shift registers with 11 stages, and has the same picture as the pixel signal stored in the shift register storage cell _P66 . The raw signal is sent to the imaging device 1.
The data may be read from the memory 3 in synchronization with the pixel signal read from the memory 3.

FIG. 6 is a block diagram showing an embodiment of the peripheral picture element reference circuit 5 of FIG. 1. In Figure 6,
18 is an input terminal for the video pattern signal from the binarization circuit 4, and 19 is a length that is one picture element shorter than the length of one scanning line (equivalent to the length of 1H-1 picture element in television). 20 is a serial input/parallel output shift register, 21 is an ExOR circuit group (exclusive OR circuit), and 22 is a NOR circuit.
In this example, the shift register 20 has five memory cells a, b, c, d, x, and as shown in FIG. b stores picture elements adjacent to the upper right, c to the upper, and d to the upper left. The signal at the output terminal 23 becomes "1" only when the picture element stored in the memory cell x from the input terminal 18 matches all of these surrounding four picture elements a to d that have already been determined to be binarized. , otherwise it is "0".

FIG. 7 is a block diagram showing an embodiment of the binarization condition determination circuit 7 of FIG.
26 and 27 are input terminals, 28 is an ExOR circuit,
29 is an inverter, 30 and 31 are respective AND circuits,
32 and 33 are inverters, respectively, and 34 and 35 are respective inverters.
36 and 37 are OR circuits, 38 is a gate circuit, and 39, 40, and 41 are output terminals, respectively.

Next, the operation shown in FIG. 7 will be explained.

In the figure, the input terminal 24 has a binarization circuit 4.
A video pattern signal from (Fig. 1) is supplied,
The input terminal 25 is connected to a boundary surrounding area extraction circuit 5 (first
A standard pattern signal is supplied to the input terminal 26 from the output terminal 1 of the boundary surrounding area extraction circuit 5.
The peripheral signal from the peripheral picture element reference circuit 6 (FIG. 5) is supplied to the input terminal 27.
A reference signal is supplied from (Fig.).

First, when the peripheral signal from the input terminal 26 is "1", that is, the picture element of the standard pattern read in the memory 3 (FIG. 1) is in the boundary peripheral area d.
(Fig. 2), one input terminal of the AND circuits 30 and 31 becomes "1",
The AND circuits 34 and 35 have an output signal level of "0" due to the inverter 32.

On the other hand, the video pattern signal from the input terminal 24 is supplied to the ExOR circuit 28 together with the gate circuit 38, where it is compared with the standard pattern signal from the input terminal 25 for each picture element, and when both picture elements match, it becomes "0". , if they do not match, an output signal of "1" is generated.

When the output signal of the ExOR circuit 28 is “0”, the level of the output signal of the AND circuit 31 is “0”
In the end, the signal obtained at the output terminal 41 via the OR circuit 37 is "0".

On the other hand, the "0" output signal of ExOR28 is inverted by the inverter 29 and becomes "1",
The AND circuit 30 is turned on and supplies a signal of "1" to the gate circuit 38 and the output terminal 40 via the OR circuit 36. For this purpose, the gate circuit 38 opens and supplies picture elements of a video pattern matching the standard pattern to the output terminal 39.

When the output signal of the ExOR circuit 28 is "1", the AND circuit 30 is turned off and the AND circuit 31 is turned on to generate a signal of "1".
The signal is supplied to the output terminal 41 via the OR circuit 37. For these, AND circuits 30, 3
4 is off, the gate circuit 38 is closed, and a signal of "0" is supplied to the output terminal 40.

Next, the peripheral signal from the input terminal 26 is “0”,
That is, when the picture element of the standard pattern read by the memory 3 (FIG. 1) is within the boundary peripheral area d (FIG. 2), the AND circuits 30 and 31 are off;
One input terminal of the AND circuits 34 and 35 is set to "1" by the inverter 32.

Therefore, the reference signal from the input terminal 27 becomes "1".
At this time, the AND circuit 34 is turned on and the AND circuit 35 is turned off. The “1” signal from the AND circuit 34 is supplied to the gate circuit 38 and the output terminal 40 via the OR circuit 36, which opens the gate circuit 38 and outputs the picture element of the video pattern signal from the input terminal 24 at that time. Terminal 39 is supplied.

On the other hand, when the reference signal from the input terminal 27 is "0", the AND circuit 34 is turned off, and the AND circuit 3
5 is turned on by the inverter 33. The “1” signal from the AND circuit 35 is supplied to the output terminal 41 via the OR circuit 37.

The signal at the output terminal 29 is supplied to the binary signal setting circuit 10 (FIG. 1, the same applies hereinafter), the signal at the output terminal 40 is supplied to the scanning position control circuit 2, and the signal at the output terminal 41 is supplied to the frequency counting circuit 8. output terminal 40
When the signal is “1”, the scanning position control circuit 2
operates to move the pattern reading positions of the imaging device 1 and memory 3 by one pixel.

FIG. 8 is a block diagram showing one embodiment of the frequency counting circuit 8 and the comparison circuit 9 of FIG.
is an input terminal, 43 is an inverter, 44 and 45 are each a counter, 46 and 47 are each a comparison circuit, 4
8 and 49 are input terminals, 50 is a selection circuit, and 51
is an OR circuit, and 52 and 53 are output terminals, respectively.

Next, the operation shown in FIG. 8 will be explained.

In the figure, when the signal at the output terminal 41 (FIG. 7) of the binarization condition determination circuit 7 becomes "1", the counters 44 and 45 are activated. At this time, as mentioned earlier, since the output signal of the output terminal 40 of the binarization condition determination circuit 7 is "0", the scanning position control circuit 2 becomes inactive, and the imaging device 1 and the memory 3 ( The reading position of the pattern according to FIG. 1) is fixed, and the input terminal 42 supplies picture element signals for the same picture element of the video pattern.

Therefore, the counter 44 counts the number of times "1" appears at the input terminal 42, and the counter 45 counts the number of times "0" appears because of the inverter 43. The number of times the voltage changes according to this number of times is set in advance by the comparators 46 and 47, respectively.
is compared with the reference voltages from the input terminals 48 and 49 corresponding to the reference voltage, and when either of them matches the reference voltage, an output signal is output, and this output signal causes the selection circuit 50 to select either "1" or "0". is selected and outputted to the output terminal 52 as a binary signal.
The output signals of the comparison circuits 46 and 47 are also supplied to an OR circuit 51, and are supplied to the scanning position control circuit 2 (FIG. 1) through an output terminal 53, which determines the pattern reading position of the imaging device 1 and memory 3 (FIG. 1). Move to the next picture element.

By the way, the reason why the counters 44 and 45 count "1" and "0" of the same picture element in this way is that even if the video pattern signal contains noise, this noise is not fixed, but changes from moment to moment, and when the same pixel in a video pattern is read repeatedly, the read pixel signal is less affected by noise than the frequency at which it is affected by noise. Since the frequency is generally larger from the statistical distribution of occurrence, a pixel signal counter that is not affected by noise will reach the setting N more quickly, and statistically it will reach the set value faster. This is because the input signal of the counter that has reached N may be determined to be correct.

For example, assume that the picture elements to be compared between the standard pattern and the video pattern are "0" and "1", respectively, and do not match, and in fact, the picture element of the video pattern at that time is "0". Suppose it's hot.

Therefore, the picture element signals for the picture elements of this video pattern are repeatedly read, and the signals are sent to the counters 44 and 4.
5, the count number of the counter 45 reaches the set value N more quickly because the frequency at which "0" picture element signals are supplied is statistically higher than the frequency at which "1" picture element signals are supplied. The comparison circuit 47 generates an output, and the selection circuit 50 obtains a pixel signal of "0". There is no major error even if this picture element signal of "0" is regarded as a correct picture element signal.

FIG. 9 is a block diagram showing a specific example of the binary signal setting circuit 10 of FIG.
9 is an output terminal.

Next, the operation shown in FIG. 9 will be explained.

In the figure, input terminals 55 and 57 each have two
Output terminals 39 and 40 (seventh
(Fig.) is supplied. Input terminal 56,5
8 are supplied with signals from output terminals 52 and 53 (FIG. 8) of the comparator circuit 9, respectively.

That is, each pixel signal of the video pattern signal from the binarization condition determination circuit 7 is supplied to the input terminal 55, and the pixel signal of the video pattern signal from the comparison circuit 9 is supplied to the input terminal 56. .

The selection circuit 54 has input terminals 57 and 58.
A pixel signal from one of the input terminals 55 and 56 is selected according to the signal supplied from the output terminal 59.
A video pattern signal containing no noise can be obtained.

In this way, it is possible to obtain a video pattern signal that can accurately inspect defects in the video pattern. However, the embodiments of each circuit shown in FIG. It is clear that circuits with equivalent functionality can also be used.

Furthermore, as explained in FIG. 5, the boundary surrounding area d in FIG. This can be set arbitrarily depending on the direction in which the maximum deviation occurs.

As explained above, according to the present invention, a video pattern formed based on a standard pattern is read, and the obtained video pattern signal is determined and corrected for each pixel signal, and for each pixel signal. In determining the elementary signal, a boundary surrounding area is set by taking into account the deviation between the standard pattern and the video pattern when reading, and when each picture element signal represents a picture element outside the boundary surrounding area, each picture element signal is and each pixel signal of the standard pattern signal with respect to the standard pattern, and when each pixel signal of the video pattern signal represents a pixel within the peripheral area of the boundary, the correlation of the video pattern is determined. Furthermore, for pixel signals that may contain noise due to the above judgment, the "1" and "0" of the pixel signal obtained by repeatedly reading the same pixel of the video pattern are determined. Since each pixel signal is corrected using the frequency distribution of This method does not require a long time and is accurate, and therefore defects in the video pattern can be quickly and accurately inspected, and the video pattern has excellent functionality except for the shortcomings of the conventional technology. A reading method can be provided.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the video pattern reading method according to the present invention, FIG. 2 is an explanatory diagram showing the area around the boundary of the standard pattern, and FIG.
4A and 4B are block diagrams showing a part of an embodiment of the boundary surrounding area extraction circuit of FIG. 1, and FIGS. B, C, D, and E are explanatory diagrams showing the operation of FIG. 4, FIG. 6 is a block diagram showing an example of the peripheral picture element reference circuit of FIG. 1, and FIG. 7 is an explanatory diagram showing the operation of FIG. 8 is a block diagram showing an example of the frequency counting circuit and comparison circuit of FIG. 1, and FIG. 9 is a block diagram of the binary signal setting circuit of FIG. 1. FIG. 2 is a block diagram showing one embodiment. 1... Imaging device, 2... Scanning position control circuit, 3
...Memory, 4...Binarization circuit, 5...Boundary surrounding area extraction circuit, 6...Surrounding pixel reference circuit, 7...
Binarization condition determination circuit, 8... Frequency counting circuit, 9...
... Comparison circuit, 10... Binary signal setting circuit.

Claims (1)

[Claims] 1. A video signal is obtained by imaging a pattern, a pixel signal of the video signal is converted into a temporary binary pixel signal, and 2 of the standard pattern is converted in synchronization with the imaging of the pattern. A digitized pixel signal is obtained, a region around the boundary in the pattern is extracted using the binarized pixel signal of the standard pattern, and the provisional binarized pixel signal is corrected to obtain a regular binarized pixel signal. A method for reading a video pattern as a signal, in which in the boundary peripheral area, for each pixel of interest in which the pattern is read, the provisional binary pixel signal of the pixel of interest and the periphery of the pixel of interest. Compare the tentative binarized pixel signals of a plurality of picture elements of 2
The corrected normal binary pixel signal for the pixel of interest is formed based on the level frequency of the pixel of interest signal, and in the case of a match, the provisional 2 pixel signal for the pixel of interest is formed.
The digitized pixel signal is the regular binarized pixel signal, and in areas other than the peripheral area of the boundary, for each pixel of interest whose pattern is read, the provisional binarized picture of the pixel of interest is The elementary signal is compared with the binarized pixel signal of the standard pattern corresponding to the pixel of interest, and if they do not match, the pixel of interest is read multiple times and a provisional binarized pixel signal is generated. obtained, the provisional 2
The corrected normal binary pixel signal for the pixel of interest is formed based on the level frequency of the pixel of interest signal, and in the case of a match, the provisional 2 pixel signal for the pixel of interest is formed.
A video pattern reading method, characterized in that the digitized pixel signal is the regular binarized pixel signal, and the binarized video signal of the pattern is obtained.