JPH0426545U - - Google Patents

Info

Publication number
JPH0426545U
JPH0426545U JP1990067997U JP6799790U JPH0426545U JP H0426545 U JPH0426545 U JP H0426545U JP 1990067997 U JP1990067997 U JP 1990067997U JP 6799790 U JP6799790 U JP 6799790U JP H0426545 U JPH0426545 U JP H0426545U
Authority
JP
Japan
Prior art keywords
integrated circuit
board
holes
circuit component
wiring pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1990067997U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990067997U priority Critical patent/JPH0426545U/ja
Publication of JPH0426545U publication Critical patent/JPH0426545U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)

Description

【図面の簡単な説明】
第1図は本考案の集積回路部品の実施例を示す
分解斜視図、第2図は第1図の回路部品の裏面図
、第3図及び第4図は第1図に示した回路部品の
製造方法説明図、第5図は従来の集積回路実装方
法を説明するもので、同図a〜dは基板側面図、
同図eはフイルムキヤリア平面図、同図fは端子
枠付き集積回路をフイルムキヤリアに接合した場
合の側面図、同図gはそれを基板上に搭載した場
合の側面図である。 10……端子枠付きの集積回路、20……基板
、21……配線パターン、22……搭載位置、2
3……外部接続端子、24……裁断面。

Claims (1)

    【実用新案登録請求の範囲】
  1. スルーホールから成る外部接続端子を周縁部に
    配し、前記各スルーホールを縦断する面で裁断し
    た基板と、当該基板上に形成された配線パターン
    の所定位置に実装された端子枠付き集積回路とか
    ら成ることを特徴とする集積回路部品。
JP1990067997U 1990-06-27 1990-06-27 Pending JPH0426545U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990067997U JPH0426545U (ja) 1990-06-27 1990-06-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990067997U JPH0426545U (ja) 1990-06-27 1990-06-27

Publications (1)

Publication Number Publication Date
JPH0426545U true JPH0426545U (ja) 1992-03-03

Family

ID=31602068

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990067997U Pending JPH0426545U (ja) 1990-06-27 1990-06-27

Country Status (1)

Country Link
JP (1) JPH0426545U (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002334951A (ja) * 1994-03-18 2002-11-22 Hitachi Chem Co Ltd 半導体素子搭載用基板及び半導体パッケージ
JP2002334948A (ja) * 1994-03-18 2002-11-22 Hitachi Chem Co Ltd 半導体パッケージ、半導体素子搭載用基板及びそれらの製造方法
JP2002334949A (ja) * 1994-03-18 2002-11-22 Hitachi Chem Co Ltd 半導体パッケージ及び半導体素子搭載用基板の製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002334951A (ja) * 1994-03-18 2002-11-22 Hitachi Chem Co Ltd 半導体素子搭載用基板及び半導体パッケージ
JP2002334948A (ja) * 1994-03-18 2002-11-22 Hitachi Chem Co Ltd 半導体パッケージ、半導体素子搭載用基板及びそれらの製造方法
JP2002334949A (ja) * 1994-03-18 2002-11-22 Hitachi Chem Co Ltd 半導体パッケージ及び半導体素子搭載用基板の製造方法

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