JPH0442798Y2 - - Google Patents

Description

[Detailed description of the invention] (Field of industrial application) The present invention relates to an alarm clock with a lifting device that is suspended from the ceiling and comes down to the user's ear only when an alarm is notified. Regarding what can be configured.

(Prior art) As a conventional clock of this kind, the Utility Model 61-1191
There were those shown in Japanese Utility Model Publication No. 61-96390.

All of these clocks are configured to be hung in advance near the user's ear, and to rise simultaneously with an alarm notification.

According to this watch, it rises to a place that is difficult for the user to reach at the same time as the alarm is activated.
The user cannot easily stop the alarm from ringing and ends up getting up and waking up.

(Problems to be Solved by the Invention) In the above-mentioned conventional technology, as soon as the alarm notification starts, the watch moves away from the user, so the alarm sound gradually moves away and becomes audible.

Therefore, if the user is not woken up when the alarm notification starts, there is a high possibility that the user will fall asleep even after the alarm notification starts.

Also, at first glance, hanging a watch may seem less intrusive than placing a watch next to your bed, but if you actually have a watch hanging near your ear, the strings will come tangled up when you turn over in your sleep. This caused inconveniences such as the watch hitting the user's face and causing the watch to sway, making it difficult to keep the watch in its proper position.

(Means for Solving the Problems) An object of the present invention is to provide an alarm clock with a lifting device that does not get in the way during use and has a higher wake-up effect.

In order to solve the above problems and achieve the purpose, the present invention includes a fall time counter that can set the fall time of the drive part for driving the motor in an alarm clock with a lifting device, and a coincidence signal that is output from the alarm circuit. a falling signal output circuit that outputs a falling signal when the falling signal is generated, a timer circuit that starts counting at the same time as this falling signal is generated, and stops outputting the falling signal when the falling time set in the falling time counter is counted, and a timer circuit that stops outputting the falling signal when the matching signal disappears. a first rising signal output circuit that outputs a first rising signal in response to a rising signal, and a second rising signal output circuit that outputs a second rising signal in response to a signal for displaying a set falling time from a mode changeover switch. a position detection switch that stops outputting each of the first and second rising signals when the clock reaches the highest position;
It is comprised of first and second drive circuits that drive motors to lower and raise the watch in response to a lowering signal and first and second raising signals, respectively.

(Example) An example of the present invention will be described below based on the drawings.

FIG. 2 is a perspective view showing the external appearance of an alarm clock with a lifting device according to an embodiment of the present invention, and FIG. 3 is a central vertical sectional view thereof.

As shown in FIG. 2, the appearance of the watch in this embodiment includes a display section 4 provided on the front of the watch case 2 for displaying the time, a time display (time correction) and an alarm time display (alarm time setting). )・Mode switch 6 to change descent distance setting
, an hour correction switch 8 and a minute correction switch 10 for correcting the hour and minute digits, and a watch case 2.
A ring stop switch 12 provided on the top surface, a thread 14 pulled out from a hole 2a formed in the center of the top surface of the watch case 2, a hooking member 16 attached to the end of the thread 14, and a ringing member 16 attached to the periphery of the hole 2a. It has a position detection switch consisting of a contact piece 18a formed thereon and a contact piece 18b attached to a predetermined highest position of the thread 14.

Further, as shown in FIG. 3, inside the watch in this embodiment, there is a motor 20 as a drive source, a reduction gear train mechanism 22 consisting of a group of gears that decelerates and transmits the rotation of the motor 20, and a thread 14. A pulley 24 is provided at the end of which is attached and rotationally driven by the reduction gear train mechanism 22.

As shown in the figure, in the initial state, a thread is wound around the pulley 24, and when the hanging member 16 is hooked to a ceiling or the like, the clock hangs as it is near the ceiling.

In this state, when the set alarm time comes, the motor 20 is rotated by a current supplied from a drive section, which will be described later, and rotates the pulley 24 via the reduction gear train mechanism 22.

At this time, the pulley 24 rotates in the direction of untying the thread 14, so that the watch gradually descends.

Then, when it descends to a preset position, it stops.

After that, when the ring stop switch 12 is operated and the alarm notification stops, the motor 20 is rotated in the opposite direction when the clock is lowered, and the pulley 24 is thereby rotated in the direction to wind the thread 14, and the clock is raised. do.

Next, the circuit configuration of the drive section of the motor etc. mentioned above will be explained using FIGS. 1a, b, and c.

In the figure, 26 is a reference signal generator, 28 is a frequency divider circuit that divides the frequency of the reference signal outputted and outputs a frequency-divided signal, and 30 is a clock circuit that inputs the frequency-divided signal and measures time.

32 is an alarm memory that stores the set alarm time.

Reference numeral 34 denotes an alarm circuit, which includes a matching circuit 36 which compares the time measurement contents of the clock circuit 30 and the stored contents of the alarm memory 32 and outputs an H level output signal when they match, and a matching circuit 36 which outputs a pulse in response to the rise of the output signal. A one-shot multivibrator (hereinafter referred to as OSM) 38 outputs, and a flip-flop (hereinafter referred to as "OSM") outputs a match signal A from its output Q by inputting its output pulses to a set input S.
(abbreviated as FF) 40, the signal from its output is input to the reset input R, the clock signal _φ1 from the middle stage of the frequency divider circuit 28 is input to the clock input φ, and the signal from the output C is input to the reset input R. FF40
The counter 42 applies the voltage to the reset input R of the counter 42.

44 is a falling time counter that can set the time for the clock to fall.

46 is a mode changeover switch, and 48 is a display changeover circuit which inputs the time signal from the clock circuit 30, the alarm time signal from the alarm memory 32, and the fall time signal from the fall time counter 44, and switches the mode changeover switch. These input signals are selectively output according to the signals from 46.

Reference numeral 50 denotes a display circuit that displays time and the like, and is composed of a decoder driver 52 that converts a signal from the display switching circuit 48 into a display drive signal, and a display section 54 that is driven by the display drive signal.

Reference numeral 56 denotes a correction switching circuit, which operates a time correction switch 58 in response to a signal from the mode selection switch 46.
The operation signal of the minute correction switch 60 is sent to the clock circuit 3.
0, alarm memory 32 or descent time counter 4
4 is selectively output.

Reference numeral 62 denotes a sound generation circuit, which generates an alarm sound in response to the coincidence signal A from the alarm circuit 34.

64 is a falling signal output circuit, which outputs a pulse in response to the rise of the coincidence signal A from the alarm circuit 34, and inputs the output signal to the set input S and receives a signal K from a timer circuit, which will be described later. The FF 68 inputs the reset input R and outputs the falling signal I.

70 is a timer circuit, which receives the signal C from the FF 68 in the falling signal output circuit 64 and the clock signal φ ₁
A counter 74 inputs the output signal to the clock signal φ and counts it. The count value of this counter 74 and the count value W of the fall time counter 44 are compared, and when they match, the output signal is set to H. a matching circuit 76 that sets the level;
In response to the rise of that output signal, the output signal K
It consists of an OSM 78 that generates pulses.

80 is a first rising signal output circuit, which includes an inverter 82 that inverts the coincidence signal A from the alarm circuit 34, an OSM 84 that outputs a pulse in response to the rising edge of the output signal, and the output signal is input to the set input S. input and output the first rising signal H
It is composed of FF86.

88 is a second rising signal output circuit, which outputs a pulse in response to the rise of the output signal B of the mode switching circuit 46 for outputting the signal from the falling time counter 44 from the display switching circuit 48.
OSM90, FF92 which inputs its output signal to set input S and outputs second rising signal J;
In response to the rising edge of the signal from the position detection switch 96, which is composed of the contact pieces 18a and 18b shown in the figure and outputs an H level signal when the clock reaches the highest position, it outputs a pulse and sends this pulse to the reset input of the FFs 86 and 92. It is composed of an OSM94 that applies voltage to R.

Reference numeral 98 designates a first drive circuit, which inputs the falling signal I through a resistor 100 to its base, and includes a transistor 102 whose emitter and collector are connected to the power supply and the first input terminal of the motor 132, respectively.
and a transistor 108 whose base is inputted with a falling signal I via a resistor 104, whose emitter is connected to the power supply and whose collector is grounded via a resistor 106; A transistor 112 whose base is connected, whose collector is connected to the second input of the motor 132, and whose emitter is grounded.
It is composed of.

114 is a second drive circuit, which includes a NOR gate 116 which inverts and inputs the first and second rising signals H and J, and whose output signal is input to the base via a resistor 118, and whose emitter and collector are connected to the power supply. and the transistor 120 connected to the second input terminal of the motor 132, respectively, and the NOR gate 1.
The output signal of 16 is inputted to the base via the resistor 122, and the emitter is connected to the power supply and the collector is grounded via the resistor 124. a transistor 130, whose collector is connected to the first input terminal of the motor 132 and whose emitter is grounded.
It consists of

Next, a drive section consisting of a fall time counter 44, a fall signal output circuit 64, a timer circuit 70, first and second rise signal output circuits 80, 88, a position detection switch 96, and first and second drive circuits 98, 114 is activated. Focusing on the operation, the elevating and lowering operations of the watch in this embodiment will be explained with reference to the time chart shown in FIG.

First, when the mode changeover switch 46 is operated to set the signal B to the H level in order to set the position at which the watch descends and stops, the display changeover circuit 48 enters a state in which it outputs the signal from the descent time counter 44.

Therefore, the descent time will be displayed on the display section 54, and the correction switching circuit 56 will be in a state of supplying operation signals for the hour correction switch 58 and minute correction switch 60 to the descent time counter 44.
It is also possible to modify the contents of the descent time counter 44 by operating the switch.

On the other hand, when the signal B from the mode changeover switch 46 becomes H level, the OSM 90 in the second rising signal output circuit 88 outputs a pulse in response to this rise, and the FF 92 is set by this pulse.

When this FF92 is set, the second rising signal J from its output becomes L level.

When this second rising signal J becomes L level, the second
The output signal of the NOR gate 116 in the drive circuit 114 also goes to L level, so that the transistor 12
0,126 becomes conductive.

When transistor 126 becomes conductive, current also flows through the base of transistor 130, and transistor 130 also becomes conductive.

Therefore, the motor 132 is connected to the transistor 120,
The motor 132 is connected to a power source via the motor 130, and a current flows from the second input terminal to the first input terminal, for example, and the motor 132 rotates to rotate the aforementioned pulley 24 in the direction of winding the thread, causing the clock to rise. do.

When the clock reaches the highest position, the position detection switch 96 is turned on, and in response to the rising edge of its output signal, the OSM 94 generates a pulse in its output signal L.

This pulse is applied to the reset input R of FF 92 to reset it.

Therefore, the second rising signal J from the output of the FF 92 becomes H level, and the output signal of the NOR gate 116 in the second drive circuit 114 also becomes H level.

Therefore, transistors 120, 126, 130
becomes non-conductive, and the motor 132 stops.

In this state, the hour/minute correction switch 58,
60 to set the count value of the descent time counter 44, and after operating the mode changeover switch 46, the correction switches 58 and 60 are operated to store the alarm time in the alarm memory 32.

Thereafter, when the alarm time set in the alarm memory 32 arrives, the coincidence circuit 36 detects this and sets its output signal to H level.

In response to the rise of this signal, OSM 38 outputs a pulse, and FF 40 is set by this pulse.

When this FF40 is set, its output Q,
Q becomes H and L levels, respectively, so that the sound generation circuit 62 generates an alarm sound, and the counter 42 is reset and starts counting immediately.

On the other hand, the coincidence signal A output from FF40 is H
When the level is reached, the drop signal output circuit 64
The OSM 66 outputs a pulse in response to a falling edge. This pulse sets FF68,
The signals C and I from the output Q, respectively, are set to H,
Make it L level.

When this falling signal I becomes L level, transistors 102 and 108 in the first drive circuit 98 become conductive.

When this transistor 108 becomes conductive,
Current also flows through the base of the transistor 112, and this transistor 112 also becomes conductive.

Therefore, the motor 132
2,112 to the power supply, and now the first
Current flows from the input end to the second input end, causing the clock to drop.

Furthermore, when the FF 68 is set and the signal C becomes H level, the AND gate 72 in the timer circuit 70 becomes open, and the counter 74 starts counting in response to the clock signal _φ1 generated at its output. Start.

When the count value of this counter 74 reaches the count value set in the fall time counter 44, the coincidence circuit 76 detects this and sets its output to H level.

In response to this rising edge, OSM 78 generates a pulse in output signal K.

This pulse resets the counter 74 and FF 68, and the falling signal I returns to H level.

Therefore, the transistors 102, 108, and 112 in the first drive circuit 98 are all rendered non-conductive, and the motor 132 stops at the set position.

While descending to the set position in this way and reporting an alarm, the counter 42 in the alarm circuit 34 counts for a certain period of time, generates a pulse from its output C, resets the FF 40, and sets the coincidence signal A to L. level or forcibly sets the match signal A to the L level by operating the ring stop switch, in response to the rise of the signal inverted by the inverter 82 in the first rising circuit 80.
OSM84 outputs pulses.

This pulse sets FF 86, which causes the first rising signal H from its output to go to L level. Therefore, the output signal of the NOR gate 116 in the second drive circuit 114 also goes to L level, and the transistors 120 and 12 operate in the same manner as described above.
6, 130 becomes conductive, the motor 132 rotates, and the clock rises.

When the clock reaches the highest position, the position detection switch 9
6 turns on, OSM9 turns on as mentioned above.
A pulse is generated in the output signal L of No. 4, and the FF 86 is reset by this pulse.

When the FF 86 is reset, the first rising signal H outputted by the FF 86 becomes H level, and therefore the motor 132 stops in the same manner as the operation described above.
The clock rises and stops.

(Effects of the invention) According to the invention, since it is stopped at a high place except when an alarm is notified, it does not get in the way.

Furthermore, since the user can set the lowering position, there is no problem such as the alarm sound being too low due to the clock stopping at a too high position, or inconveniences such as the clock stopping too high and hitting the user's head. Furthermore, since it automatically rises and stops when the alarm notification is stopped, the user does not have to take up the trouble of winding up the thread after the alarm notification.

[Brief explanation of the drawing]

Figures 1a, b, and c are circuit diagrams showing the circuit configuration of an alarm clock with a lifting device according to an embodiment of the present invention;
Figure 2 is an external perspective view of an alarm clock with a lifting device.
Figure 3 is a central vertical sectional view of the clock shown in Figure 2;
The figure is a time chart. 14...Thread, 16...Latching member, 20,132
... Motor, 22 ... Reduction gear train mechanism, 24 ... Pulley, 26 ... Reference signal generator, 28 ... Frequency dividing circuit, 30 ... Timing circuit, 32 ... Alarm memory, 34 ... Alarm circuit, 44...Descent time counter, 46...Mode changeover switch, 48...
Display switching circuit, 50... Display circuit, 62... Sound generation circuit, 64... Falling signal output circuit, 70... Timer circuit, 80... First rising signal output circuit, 88
...Second rising signal output circuit, 96...Position detection switch, 98...First drive circuit, 114...Second
drive circuit.

Claims (1)

[Claims for Utility Model Registration] A reference signal generator, a frequency dividing circuit that divides the frequency of the reference signal from the reference signal generator, and a timekeeping circuit that measures time in response to the output signal from the frequency dividing circuit. an alarm memory that stores an alarm setting time; an alarm circuit that detects when the timing content of the timing circuit matches the memory content of the alarm memory and outputs a coincidence signal for a certain period of time; a sound generation circuit that emits an alarm sound in response to a coincidence signal; a mode changeover switch; and a display that receives output signals from the clock circuit and alarm memory and outputs an input signal corresponding to selection operation of the mode changeover switch. A switching circuit, a display circuit that displays time, etc. in response to an output signal from the display switching circuit, a motor, and a reduction gear train mechanism that is connected to a rotating shaft of the motor and decelerates rotation of the rotating shaft. , a pulley connected to the reduction gear train mechanism; a thread attached at one end to the pulley and at the other end to a latching member for supporting a watch body; and upon generation of a coincidence signal from the alarm circuit. An alarm clock with a lifting device, comprising: a drive unit that drives the motor in response; and a drop time counter that is capable of setting a drop time and applies a signal indicating the setting to the display switching circuit. a falling signal output circuit that outputs a falling signal in response to the generation of a coincidence signal from the alarm circuit; and a falling signal output circuit that starts counting in response to the generation of the falling signal from the falling signal output circuit, and controls the falling time counter. a timer circuit that outputs a signal that causes the falling signal output circuit to stop outputting the falling signal when the count reaches a value corresponding to the count value of , and outputting a first rising signal in response to disappearance of the coincidence signal from the alarm circuit. a first rising signal output circuit that outputs a second rising signal when the operation signal of the mode changeover switch is a signal that causes the display switching circuit to selectively output the output signal of the falling time counter; a signal output circuit;
and a position detection switch that outputs a signal for stopping the output of the first and second ascending signals from the second ascending signal output circuit, respectively; A first drive circuit that rotates the motor; and a second drive circuit that rotates the motor in a direction to wind the thread around the pulley in response to the first and second rising signals, respectively. Alarm clock with lifting device.