JPH0442930A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve reliability without forming a trap film at the oxide film on a MOS device by introducing the n-type impurities into a gate polysilicon electrode, and applying heat treatment and stacking an insulating film. CONSTITUTION:An SiO2 2 being the gate oxide film is formed on a silicon substrate by thermal oxidation method. Next, by decompressed CVD method, a polysilicon 13 is formed. Then, phosphorus is introduced into the polysilicon 13 by performing heat treatnt in POCl3 atmosphere so as to reduce the resistance of polysilicon. Furthermore, heat treatment is performed. Next, by normal pressure CVD method, a CVD oxide film 5 is grown. Furthermore, the patterning of the gate is performed, and the CVD oxide film 5 and the polysilicon 24 are patterned. Subsequently, the sidewall formation by oxide film deposition and anisotropic etching is performed to form a CVD-SiO2-26 is formed. Next, to form source and drain by ion implantation, an implantation layer 7 is formed. After this, BPSG 8 is deposited, and through contact formation, aluminum stacking, aluminum wiring patterning, and etching, Al 9 is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method of manufacturing a highly reliable semiconductor device.

Conventional technology Conventionally, stabilization of electrical characteristics in MO3 type semiconductor devices,
In applications such as self-line contacts, an insulating film is sometimes formed on polysilicon as a gate electrode, and then the gate is patterned.

Figures 3 (a) and (b) show specific examples of conventional manufacturing methods.
(c) Shown in (d). As shown in FIG. 3(a), SiO2G21 is formed on a silicon substrate (+1), and polysilicon 1 (13) is formed thereon by low pressure CVD.

Furthermore, phosphorus was introduced into the PolyNoricone I C13 by a thermal diffusion method (7, followed by atmospheric pressure C on the PolyNoricone 103).
A CVD oxide film 14 is deposited using the VD method. After this, gate patterning is performed, and according to this patterning, CV
D oxide film (14, polysilicon 103 is patterned. After that, by performing heat treatment, for example, dry oxidation, polysilicon 1G is formed as shown in FIG. 3())).
A trap layer 00 is formed at the oxide film interface directly under the polysilicon 2α9 where the grains of No. 3 have grown. After this, Figure 3(c)
CVD-3i 02-207) as shown in
A zide wall is formed by deposition using the VD method and anisotropic etching. Next, the source and drain of the transistor are formed by forming an injection layer 18 in a self-aligned manner. After 7, as shown in FIG. 3(d), BPSG (Boro-Phos
After that, a contact hole is formed, aluminum is deposited, and an aluminum wiring is formed to form AIQ. A MOS transistor was formed by such a method.

Problems to be Solved by the Invention In the conventional method described above, heat treatment such as oxidation is performed after patterning the gate, so as the grain size of polysilicon 2α9 grows, minute stress is generated in polysilicon 205 and polysilicon 2αS S i O * C which is the oxide film directly below
A trap layer 0Q is formed in 1'ZJ. When a load is applied for a long time under high temperature and high electric field stress conditions due to this trap layer Oe, the threshold voltage of the MOS transistor changes significantly compared to its initial value. In other words, the MOS device formed in this way has a problem of being extremely unreliable.

The present invention solves the above-mentioned conventional problems, and aims to provide a method for manufacturing a highly reliable semiconductor device without forming a trap layer in the oxide film of a MOS device.

Means for Solving the Problems In order to solve the above problems, the method for manufacturing a semiconductor device of the present invention includes forming an oxide film on a semiconductor substrate, and applying heat diffusion to a gate polysilicon electrode formed on the oxide film. After introducing n-type impurities and then performing heat treatment, an insulating film is deposited, and then a gate is patterned to form a MOS.
It is what makes the device.

Further, the heat treatment in the method for manufacturing a semiconductor device of the present invention is performed in an inert gas atmosphere.

Operation With the above configuration, after introducing n-type impurities into the gate polysilicon electrode, heat treatment is performed to sufficiently grow the polysilicon grain size, and then an insulating film is deposited, so that the insulating film is deposited directly under the gate polysilicon electrode. A reliable MOS device is formed by not applying unnecessary stress to the oxide film and thereby preventing the formation of a trap layer.

EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings.

Figure 1 (a) (b) (c) (d) (e) (f
) is a cross-sectional process flow showing a method for manufacturing a semiconductor device according to an embodiment of the present invention. As shown in FIG. 1(a), a gate oxide film S10 is formed on a silicon substrate (1).
2C2) is formed by a thermal oxidation method. Next, reduced pressure CV
Polysolicon I (3) is formed by method D. After this, as shown in FIG. 1(b), phosphorus is introduced into the polysilicon 1 (3) by heat treatment in an atmosphere at POC1 to reduce the resistance of the polysilicon.Furthermore, heat treatment is performed. This heat treatment is carried out at 900 degrees in a nitrogen atmosphere.This causes the grain size of the polysilicon to grow.At this time, there is no substance on the polysilicon 2 (4) that has grown in grain size to prevent grain size growth. No trap layer is formed in the underlying oxide film 2.Next, as shown in FIG. 1(c), a CVD oxide film (5) is grown by atmospheric pressure CVD.

Further, as shown in FIG. 1(d), gate patterning is performed, and the CVD oxide film (5) and polysilicon 2 (4) are patterned in accordance with this patterning.

Next, as shown in FIG. 1(e), an oxide film is deposited by low-pressure CVD and a sidewall is formed by anisotropic etching to form CVD-3i O22 (61).Next, source/drain is formed by ion implantation. After that, as shown in FIG. (forms 91. This results in MO
S) A transistor is formed.

Figure 2 (a) shows the CV characteristics when implementing the conventional example, and Figure 2 (b) shows the CV characteristics when implementing the present example. , shows the relationship between the voltage Vg applied to SiOx and its capacitance C. In Figure 2 (a) and (b), the dotted line a l+ a x is an ideal curve, and al is the low frequency Cv
The characteristic, a, indicates the high frequency Cv characteristic, and the solid line b1,
bt, b*, ba are curves obtained by experiment, b, ,
b, is the low frequency CV characteristic;

1) 4 indicates high-rise 5icv characteristics. NSC (Nondoped 5ilica), which is a conventional film
An abnormal waveform b1 is seen in the low frequency CV characteristic in the case where heat treatment was performed after depositing te Glass (FIG. 2(a)).

This indicates an increase in interface states. However, in the case of this example in which heat treatment was performed before 1'-JSG deposition (FIG. 2(b)), such an abnormal increase in interface states is not observed.

Note that the method of introducing phosphorus into polysilicon in the present invention is not limited to POCZ or heat treatment in an atmosphere, for example,
Phosphorus is added at the same time during heat treatment, ion implantation, and polysilicon deposition.
A similar effect can be obtained with DOPED polysilicon. Further, the heat treatment in a nitrogen atmosphere is not limited to nitrogen, and may be in any inert gas atmosphere, for example, in an argon atmosphere. In addition, the same effect can be obtained with oxygen or a gas having it as a component, or the effect is small.

Further, the temperature of the heat treatment performed in a nitrogen atmosphere may be 900 degrees in this embodiment, or may be higher than the heat treatment temperature after depositing the insulating film in the conventional example.

Effects of the Invention As described above, according to the present invention, it is possible to form a highly reliable device without generating excess wrap in the oxide film under the gate polysilicon electrode, thereby improving the reliability of the LSI itself. It is something that can be greatly improved.

[Brief explanation of drawings]

Figure 1 (a) (b) (e) (d) (e) (f
) is a cross-sectional process flow showing a method for manufacturing a semiconductor device according to an embodiment of the present invention, FIGS. 2(a) and 2(b) respectively show C characteristics, and FIG. Figure 2 (b) is the CV characteristic diagram when this example is implemented, Figure 3 (a) (b) (c) (d)
) is a cross-sectional process flow showing a conventional method for manufacturing a semiconductor device. ■...Semiconductor substrate, 2...SiO++, 3...Polysilicon 1, 4...Polysilicon 2.5...CV
D oxide film, 6...CV D-3i O2-2,7.
... Injection layer, 8-=BPSG, 9-A1. Agent Yoshihiro MorimotoFigure 1 (1,000) 5-(VD- i5i-1IN Figure 1(f#2λ 6-(VD-5(θt-2 7・-・j main input Layer 8 - BPS &5' Al Fig. 3 (fol) Fig. 2 a a Fig. 3 cfl2J /4

Claims (1)

[Claims] 1. An oxide film is formed on a semiconductor substrate, an n-type impurity is introduced into the gate polysilicon electrode formed on the oxide film by a thermal diffusion method, and then heat treatment is performed. Depositing a film and then patterning the gate to create a MOS
A method for manufacturing semiconductor devices. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the heat treatment is performed in an inert gas atmosphere.