JPH0443641A - Manufacture of semiconductor element - Google Patents
Manufacture of semiconductor elementInfo
- Publication number
- JPH0443641A JPH0443641A JP15204290A JP15204290A JPH0443641A JP H0443641 A JPH0443641 A JP H0443641A JP 15204290 A JP15204290 A JP 15204290A JP 15204290 A JP15204290 A JP 15204290A JP H0443641 A JPH0443641 A JP H0443641A
- Authority
- JP
- Japan
- Prior art keywords
- photosensitive polyimide
- film
- inorganic insulating
- insulating film
- polyimide film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 21
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 7
- 229920001721 polyimide Polymers 0.000 claims abstract description 42
- 238000000034 method Methods 0.000 claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 8
- 238000005530 etching Methods 0.000 claims abstract description 6
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 239000004642 Polyimide Substances 0.000 abstract description 11
- 238000001312 dry etching Methods 0.000 abstract description 6
- 239000011368 organic material Substances 0.000 abstract description 3
- 238000004528 spin coating Methods 0.000 abstract description 3
- 230000008030 elimination Effects 0.000 abstract 1
- 238000003379 elimination reaction Methods 0.000 abstract 1
- 238000007796 conventional method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000009719 polyimide resin Substances 0.000 description 2
- 238000010276 construction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 210000004709 eyebrow Anatomy 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、有機絶縁膜を有する半導体素子の製造方法に
関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing a semiconductor element having an organic insulating film.
従来の技術
近年、半導体集積回路の高集積化、高密度化に伴い、多
層配線が多用されるようになり、これに伴い、配線の層
間あるいは層上での凹凸が激しくなり、この凹凸の解消
手段として、感光性ポリイミド樹脂などの有機物をウェ
ハ上に回転塗布して平坦化を行なう技術が利用されてい
る。さらに、半導体素子の樹脂封止型パッケージにおい
て、封止樹脂中に含まれる石英を主成分とした充填材が
半導体素子に与えるダメージの保護材として、半導体素
子表面にも感光性ポリイミド樹脂が用いられている。Background of the Invention In recent years, as semiconductor integrated circuits have become more highly integrated and densely packed, multilayer wiring has come into widespread use.As a result, unevenness between and on wiring layers has become more severe, and it is necessary to eliminate these unevenness. As a means, a technique is used in which an organic material such as a photosensitive polyimide resin is spin-coated onto a wafer to flatten it. Furthermore, in resin-sealed packages for semiconductor devices, photosensitive polyimide resin is also used on the surface of the semiconductor device to protect the semiconductor device from damage caused by the quartz-based filler contained in the sealing resin. ing.
以下、その構成について第２図を参照しながら説明する
。まず、第２図（ａ）に示した所定の前段工程を終了し
、無機絶＆ｔｌｌｌ１２をパターン形成した半導体基板
１１上に、第２図（ｂ）に示したように液状の感光性ポ
リイミドを回転塗布し、半硬化させ、感光性ポリイミド
膜１３を形成する。引き続と、第２図（（２）に示した
ように、フォトリソグラフィ技術を用いて、感光性ポリ
イミド膜１３を所定の現像液によってパターンニングし
、その後、感光性ポリイミド膜１３を硬化する。The configuration will be explained below with reference to FIG. 2. First, after completing the predetermined pre-step process shown in FIG. 2(a), liquid photosensitive polyimide is rotated onto the semiconductor substrate 11 on which the inorganic &tllll12 pattern is formed, as shown in FIG. 2(b). The photosensitive polyimide film 13 is formed by coating and semi-curing. Subsequently, as shown in FIG. 2 ((2)), the photosensitive polyimide film 13 is patterned using a predetermined developer using a photolithography technique, and then the photosensitive polyimide film 13 is cured.
発明が解決しようとする課題
このような従来の半導体素子の製造方法では、第２図（
（２）に示した感光性ポリイミド膜１３の現像時に、抜
きパターン部にポリイミド残渣１４が発生し、これは現
像時間を延長してもなくならない。そのため、最終保護
膜として使用する場合、その後の組立工程のワイヤーボ
ンド時にボンディング不良が発生し、組立不能となるこ
とがしばしば起きていた。また、眉間絶縁膜として使用
する場合は、下層の配線層とポリイミド膜を介した上層
の配線層がコンタクト不良を引き起こしてしまうという
課題があった。Problems to be Solved by the Invention In such a conventional method of manufacturing a semiconductor device, as shown in FIG.
During the development of the photosensitive polyimide film 13 shown in (2), a polyimide residue 14 is generated in the punched pattern area, and this does not disappear even if the development time is extended. Therefore, when used as a final protective film, bonding defects often occur during wire bonding in the subsequent assembly process, making assembly impossible. Furthermore, when used as an insulating film between the eyebrows, there was a problem in that the lower wiring layer and the upper wiring layer via the polyimide film caused contact failure.
本発明は上記課題を解決するもので、接触不良の起こら
ない、低価格の半導体素子を提供することを目的として
いる。The present invention solves the above problems, and aims to provide a low-cost semiconductor element that does not cause contact failure.
課題を解決するための手段
本発明は」二足目的を達成するために、無機絶縁膜が形
成された半導体基板上に感光性ポリイミドを塗布してプ
リベークし、感光性ポリイミド膜を露光・現像・硬化し
、さらに引き続と、感光性ポリイミド膜をマスクとして
、下地の無機絶縁膜をエツチングする工程を備えたもの
である。Means for Solving the Problems In order to achieve the two objectives of the present invention, photosensitive polyimide is coated on a semiconductor substrate on which an inorganic insulating film is formed, prebaked, and the photosensitive polyimide film is exposed, developed, and The method includes a step of curing and subsequently etching the underlying inorganic insulating film using the photosensitive polyimide film as a mask.
作用
本発明は上記した構成により、感光性ポリイミド膜をマ
スクとして、下地の無機絶縁膜をパターンニングするた
め、ポリイミド現像時の残渣は下地の無機絶縁膜のエツ
チング時にエツチングされて除去される。Operation According to the above-described structure, the present invention patterns the underlying inorganic insulating film using the photosensitive polyimide film as a mask, so that the residue from polyimide development is etched and removed when the underlying inorganic insulating film is etched.
実施例
以下、本発明の第１の実施例を第１図を用いて説明する
。まず、第１図（ａ）のように、例えばＰ−３ｉＮなど
の無機絶縁膜２が形成された半導体基板１に、これらを
おおって、有機物として感光性ポリイミド膜３を回転塗
布方法によって回転数２０００ｒｐｍ、付近で被膜形成
し、１００℃程度の温度でプリベークする。次に第１図
（ｂ）に示したように、感光性ポリイミド膜３を露光・
現像・硬化してパターン形成する。この特に、抜きパタ
ーン部にポリイミド残渣４が発生する。これは現像時間
を延長してもなくならない。さらにその直後（こ、］”
４＋０２プラズマ（こよるドライエツチングを行なう。EXAMPLE A first example of the present invention will be described below with reference to FIG. First, as shown in FIG. 1(a), a semiconductor substrate 1 on which an inorganic insulating film 2, such as P-3iN, is formed is covered with a photosensitive polyimide film 3 as an organic material by a spin coating method at a rotational speed. A film is formed at around 2000 rpm and prebaked at a temperature of about 100°C. Next, as shown in FIG. 1(b), the photosensitive polyimide film 3 is exposed to light.
Develop and harden to form a pattern. In particular, polyimide residue 4 is generated in the punched pattern area. This problem does not disappear even if the development time is extended. Furthermore, right after that (ko,]”
4+02 plasma (perform dry etching).
このエツチングの初期過程でポリイミド残渣４はエツチ
ングされ、さらに、露出した下地の無機絶縁膜２がエツ
チングされ、第１図（（２）に示したようにパターンニ
ングされる。In the initial process of etching, the polyimide residue 4 is etched, and the exposed underlying inorganic insulating film 2 is etched and patterned as shown in FIG. 1 ((2)).
この時の感光性ポリイミド膜３と、Ｐ−８ｉＮの無機絶
縁膜２のＣＦ４＋０２プラズマドライエツチの選択比は
６程度で、例えば、１００００ＡのＰ−３ｉＮをエツチ
ングするとずれば、感光性ポリイミド膜３は１７００Ａ
程度エツヂングされ、５０Ａ程度のポリイミド残渣４は
確実にエツチングされる。At this time, the selectivity of the CF4+02 plasma dry etching between the photosensitive polyimide film 3 and the P-8iN inorganic insulating film 2 is about 6. 1700A
The polyimide residue 4 of about 50A is reliably etched.
なお、ここでは、Ｐ−８ｉＮ膜を用いたが、他の無機絶
縁膜においても、それに応じたガス系を用いることによ
って同様の効果が得られる。Note that although a P-8iN film is used here, similar effects can be obtained with other inorganic insulating films by using an appropriate gas system.
次に本発明の第２の実施例を説明する。これは、第１図
における硬化の工程の順序が異なり、第１図（ａ）のよ
うに、例えばＰ−３ｉＮなどの無機絶縁膜２が形成され
た半導体基板１に、これらをおおって、有機物として感
光性ポリイミド膜３を回転塗布法によって被膜形成し、
プリベークする。次に、感光性ポリイミド膜３を露光・
現像してパターン形成し、さらにそれらの直後に、感光
付ポリイミド膜３をマスクとして、下地の無機絶縁膜２
をＣＦＪ十０２プラズマによるドライ、エツチングを用
いてパターンニーングする。、これにより、ポリイミド
残渣が同時にエツチングされて除去される。この直後、
感光付ポリイミド膜３を硬化する。ずなわちドライ−エ
ツチング時のプラズマによるダメージが、後の感光性ポ
リイミド膜３の硬化時の熱処理により解消されるという
特徴がある。Next, a second embodiment of the present invention will be described. This is because the order of the curing process is different from that shown in FIG. 1, and as shown in FIG. A photosensitive polyimide film 3 is formed as a film by a spin coating method,
Pre-bake. Next, the photosensitive polyimide film 3 is exposed to light.
Immediately after developing and forming a pattern, using the photosensitive polyimide film 3 as a mask, the underlying inorganic insulating film 2 is
The pattern is patterned using CFJ102 plasma drying and etching. , whereby the polyimide residue is etched and removed at the same time. Immediately after this,
The photosensitive polyimide film 3 is cured. In other words, damage caused by plasma during dry etching is eliminated by heat treatment during curing of the photosensitive polyimide film 3 later.
発明の効果
以上の実施例から明らかなように本発明によれば、感光
性ポリイミド膜をマスクとして、下地の無機絶縁膜をド
ライエッチによってパターンニングするため、ポリイミ
ド膜現像時の残渣は、下地の無機絶縁膜のドライエツチ
ング時にエツチングされて除去され、簡単な構造工程で
接触不良の起こらない、低価格、高品質の半導体素子を
提供できる。Effects of the Invention As is clear from the above embodiments, according to the present invention, the underlying inorganic insulating film is patterned by dry etching using the photosensitive polyimide film as a mask. The inorganic insulating film is etched and removed during dry etching, and a low-cost, high-quality semiconductor element that does not cause contact failure can be provided through a simple construction process.
第１図（ａ） 、 （ｂ） 、 （ｃ）は本発明の一実
施例の半導体素子の製造方法を示した工程順断面図、第
２図（ａ） 、 （ｂ） 、 （（２）は従来の半導体
素子の製造方法を示した工程順断面図である。
１・・・・・・半導体基板、２・・・・・・無機絶縁膜
、３・・・・・・感光性ポリイミド膜。FIGS. 1(a), (b), and (c) are step-by-step sectional views showing a method for manufacturing a semiconductor device according to an embodiment of the present invention, and FIGS. 2(a), (b), and ((2) 1 is a cross-sectional view showing a conventional method for manufacturing a semiconductor device in the order of steps. 1... Semiconductor substrate, 2... Inorganic insulating film, 3... Photosensitive polyimide film. .
Claims (2)
の無機絶縁膜の上に感光性ポリイミド膜を塗布してプリ
ベークする工程と、前記感光性ポリイミド膜を露光・現
像・硬化する工程と、前記感光性ポリイミド膜をマスク
として前記無機絶縁膜をエッチングする工程とを有する
半導体素子の製造方法。(1) A step of forming an inorganic insulating film on a semiconductor substrate, a step of coating and prebaking a photosensitive polyimide film on the inorganic insulating film, and a step of exposing, developing, and curing the photosensitive polyimide film. and etching the inorganic insulating film using the photosensitive polyimide film as a mask.
の無機絶縁膜の上に感光性ポリイミド膜を塗布してプリ
ベークする工程と、前記感光性ポリイミド膜を露光・現
像する工程と、前記感光性ポリイミド膜をマスクとして
前記無機絶縁膜をエッチングする工程と、前記感光性ポ
リイミド膜を硬化する工程とを有する半導体素子の製造
方法。(2) a step of forming an inorganic insulating film on a semiconductor substrate; a step of coating and prebaking a photosensitive polyimide film on the inorganic insulating film; a step of exposing and developing the photosensitive polyimide film; A method for manufacturing a semiconductor device, comprising etching the inorganic insulating film using a photosensitive polyimide film as a mask, and curing the photosensitive polyimide film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15204290A JPH0443641A (en) | 1990-06-11 | 1990-06-11 | Manufacture of semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15204290A JPH0443641A (en) | 1990-06-11 | 1990-06-11 | Manufacture of semiconductor element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0443641A true JPH0443641A (en) | 1992-02-13 |
Family
ID=15531790
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15204290A Pending JPH0443641A (en) | 1990-06-11 | 1990-06-11 | Manufacture of semiconductor element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0443641A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6127099A (en) * | 1995-04-24 | 2000-10-03 | Nec Corporation | Method of producing a semiconductor device |
| WO2021064944A1 (en) * | 2019-10-03 | 2021-04-08 | 三菱電機株式会社 | Semiconductor device and power conversion device |
| CN115373215A (en) * | 2022-09-02 | 2022-11-22 | 西北工业大学 | Method for preparing film mask plate by adopting photoetching method and application thereof |
-
1990
- 1990-06-11 JP JP15204290A patent/JPH0443641A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6127099A (en) * | 1995-04-24 | 2000-10-03 | Nec Corporation | Method of producing a semiconductor device |
| WO2021064944A1 (en) * | 2019-10-03 | 2021-04-08 | 三菱電機株式会社 | Semiconductor device and power conversion device |
| JPWO2021064944A1 (en) * | 2019-10-03 | 2021-04-08 | ||
| CN115373215A (en) * | 2022-09-02 | 2022-11-22 | 西北工业大学 | Method for preparing film mask plate by adopting photoetching method and application thereof |
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