JPH044441U - - Google Patents
Info
- Publication number
- JPH044441U JPH044441U JP4436190U JP4436190U JPH044441U JP H044441 U JPH044441 U JP H044441U JP 4436190 U JP4436190 U JP 4436190U JP 4436190 U JP4436190 U JP 4436190U JP H044441 U JPH044441 U JP H044441U
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- converter
- signal
- converted
- tuning
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims 2
- 230000010355 oscillation Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Superheterodyne Receivers (AREA)
- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
Description
第１図はこの考案の実施例を示すブロツク図、
第２図はその補正回路２３の他の例を示すブロツ
ク図、第３図は従来の周波数選択受信回路を示す
ブロツク図である。
Figure 1 is a block diagram showing an embodiment of this invention.
FIG. 2 is a block diagram showing another example of the correction circuit 23, and FIG. 3 is a block diagram showing a conventional frequency selective receiving circuit.
Claims (1)
換器へ供給し、周波数シンセサイザよりなる周波
数掃引発振器の出力局部信号により上記入力信号
を周波数変換すると共に、上記周波数掃引発振器
の周波数制御信号と対応した信号をＡＤ変換器で
デジタル信号に変換し、そのデジタル信号をデー
タ変換回路で同調データに変換し、その同調デー
タをＤＡ変換器でアナログ信号に変換し、そのア
ナログ信号で上記可変同調フイルタの同調周波数
を制御する周波数選択受信回路において、 上記ＡＤ変換器と、上記データ変換回路との間
に挿入され、上記ＡＤ変換器の出力をアドレスと
して読出されるメモリを有し、上記ＡＤ変換器の
出力の、上記周波数掃引発振器の発振周波数と対
応する理想的な値からのずれを補正して出力する
補正回路が設けられていることを特徴とする周波
数選択受信回路。[Claims for Utility Model Registration] Supplying an input signal to a frequency converter through a variable tuning filter, converting the frequency of the input signal using an output local signal of a frequency sweep oscillator made of a frequency synthesizer, and controlling the frequency of the frequency sweep oscillator. A signal corresponding to the signal is converted into a digital signal by an AD converter, the digital signal is converted into tuning data by a data conversion circuit, the tuning data is converted into an analog signal by a DA converter, and the above-mentioned variable is converted with the analog signal. A frequency selection receiving circuit for controlling a tuning frequency of a tuning filter, comprising a memory inserted between the AD converter and the data conversion circuit and read out using the output of the AD converter as an address; A frequency selection receiving circuit comprising a correction circuit that corrects and outputs a deviation of the output of the converter from an ideal value corresponding to the oscillation frequency of the frequency sweep oscillator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4436190U JPH044441U (en) | 1990-04-25 | 1990-04-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4436190U JPH044441U (en) | 1990-04-25 | 1990-04-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH044441U true JPH044441U (en) | 1992-01-16 |
Family
ID=31557593
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4436190U Pending JPH044441U (en) | 1990-04-25 | 1990-04-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH044441U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS628612A (en) * | 1985-07-05 | 1987-01-16 | Matsushita Electric Ind Co Ltd | Tuner input stage filter tuning device |
-
1990
- 1990-04-25 JP JP4436190U patent/JPH044441U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS628612A (en) * | 1985-07-05 | 1987-01-16 | Matsushita Electric Ind Co Ltd | Tuner input stage filter tuning device |
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