JPH0446543U - - Google Patents
Info
- Publication number
- JPH0446543U JPH0446543U JP1990089048U JP8904890U JPH0446543U JP H0446543 U JPH0446543 U JP H0446543U JP 1990089048 U JP1990089048 U JP 1990089048U JP 8904890 U JP8904890 U JP 8904890U JP H0446543 U JPH0446543 U JP H0446543U
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- metal wire
- thin metal
- lead base
- semiconductor pellet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/0711—Apparatus therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/0711—Apparatus therefor
- H10W72/07141—Means for applying energy, e.g. ovens or lasers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Wire Bonding (AREA)
Description
第１図は本考案に係る半導体装置の斜視断面図
、第２図ａ，ｂ，ｃ，ｄはリードとワイヤをカシ
メ固定する際の工程説明図、第３図ａ，ｂ、第４
図ａ，ｂ、第５図ａ，ｂの他の実施例を示すもの
であつて夫々ａはカシメ固定する前のリードの斜
視図、ｂはカシメ固定した後のリード長手方向で
の断面図、第６図ａ，ｂは従来のワイヤボンデイ
ング工程を示すもので、ａはフアーストボンデイ
ング、ｂはセカンドボンデイングを示す工程説明
図、第７図は従来の半導体装置の斜視断面図を示
す。
１……半導体装置、２……基板、３……半導体
ペレツト、５……金属細線、６……リード基部。
FIG. 1 is a perspective cross-sectional view of a semiconductor device according to the present invention, FIGS.
Figures a and b show other embodiments of Figures a and b, in which a is a perspective view of the lead before it is crimped and fixed, and b is a sectional view in the longitudinal direction of the lead after it is crimped and fixed; FIGS. 6a and 6b show a conventional wire bonding process, in which a is a process explanatory diagram showing first bonding, b is a process explanatory diagram showing second bonding, and FIG. 7 is a perspective sectional view of a conventional semiconductor device. DESCRIPTION OF SYMBOLS 1...Semiconductor device, 2...Substrate, 3...Semiconductor pellet, 5...Metal thin wire, 6...Lead base.
Claims (1)
周辺に配置されたリード基部とを金属細線で電気
的に接続した半導体装置において、 上記半導体ペレツトから伸びる上記金属細線の
端部を上記リード基部にカシメ固定したことを特
徴とする半導体装置。[Claims for Utility Model Registration] A semiconductor device in which a semiconductor pellet mounted on a substrate and a lead base disposed around the substrate are electrically connected by a thin metal wire, an end of the thin metal wire extending from the semiconductor pellet. is fixed to the lead base by caulking.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990089048U JPH0446543U (en) | 1990-08-24 | 1990-08-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990089048U JPH0446543U (en) | 1990-08-24 | 1990-08-24 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0446543U true JPH0446543U (en) | 1992-04-21 |
Family
ID=31822753
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990089048U Pending JPH0446543U (en) | 1990-08-24 | 1990-08-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0446543U (en) |
-
1990
- 1990-08-24 JP JP1990089048U patent/JPH0446543U/ja active Pending