JPH0448646U - - Google Patents

Info

Publication number
JPH0448646U
JPH0448646U JP1990091449U JP9144990U JPH0448646U JP H0448646 U JPH0448646 U JP H0448646U JP 1990091449 U JP1990091449 U JP 1990091449U JP 9144990 U JP9144990 U JP 9144990U JP H0448646 U JPH0448646 U JP H0448646U
Authority
JP
Japan
Prior art keywords
receiving element
light receiving
amplifier circuit
electrode layer
light
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1990091449U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990091449U priority Critical patent/JPH0448646U/ja
Publication of JPH0448646U publication Critical patent/JPH0448646U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/753Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips

Description

【図面の簡単な説明】
第1図は本考案の一実施例を示す断面図である

Claims (1)

    【実用新案登録請求の範囲】
  1. 第1電極層、非晶質半導体層及び第2電極層を
    順次積層してなる受光素子と、この受光素子の出
    力信号を増幅するべく受光素子に接続される増幅
    回路とを、同一基板上に配すると共に、受光素子
    、増幅回路及びこれらの接続部を、電気的に接地
    した導電性ペーストで覆つたことを特徴とする光
    センサ。
JP1990091449U 1990-08-30 1990-08-30 Pending JPH0448646U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990091449U JPH0448646U (ja) 1990-08-30 1990-08-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990091449U JPH0448646U (ja) 1990-08-30 1990-08-30

Publications (1)

Publication Number Publication Date
JPH0448646U true JPH0448646U (ja) 1992-04-24

Family

ID=31827094

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990091449U Pending JPH0448646U (ja) 1990-08-30 1990-08-30

Country Status (1)

Country Link
JP (1) JPH0448646U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008066583A (ja) * 2006-09-08 2008-03-21 Asahi Kasei Electronics Co Ltd 光センサ

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008066583A (ja) * 2006-09-08 2008-03-21 Asahi Kasei Electronics Co Ltd 光センサ

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