JPH0465461U - - Google Patents

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Publication number
JPH0465461U
JPH0465461U JP10877290U JP10877290U JPH0465461U JP H0465461 U JPH0465461 U JP H0465461U JP 10877290 U JP10877290 U JP 10877290U JP 10877290 U JP10877290 U JP 10877290U JP H0465461 U JPH0465461 U JP H0465461U
Authority
JP
Japan
Prior art keywords
diffusion layer
gate
depth
anode
channel stopper
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10877290U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10877290U priority Critical patent/JPH0465461U/ja
Publication of JPH0465461U publication Critical patent/JPH0465461U/ja
Pending legal-status Critical Current

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  • Thyristors (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本案の一実施例の略断面図、第2図は
従来の一例の略断面図である。 1……N型半導体基板、2……アノード拡散層
、3……Pゲート拡散層、4……チヤネルストツ
パー拡散層、5……カソード拡散層。
FIG. 1 is a schematic sectional view of an embodiment of the present invention, and FIG. 2 is a schematic sectional view of a conventional example. DESCRIPTION OF SYMBOLS 1... N-type semiconductor substrate, 2... Anode diffusion layer, 3... P gate diffusion layer, 4... Channel stopper diffusion layer, 5... Cathode diffusion layer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体基板の表面に、アノード拡散層と、Pゲ
ート拡散層と、Pゲート拡散層の一部に設けられ
たカソード拡散層と、Pゲート拡散層とアノード
拡散層との間に設けられたチヤネルストツパー拡
散層とを形成し、チヤネルストツパー拡散層の拡
散深さをPゲート拡散層の深さ以上としたスイツ
チング素子。
An anode diffusion layer, a P gate diffusion layer, a cathode diffusion layer provided in a part of the P gate diffusion layer, and a channel stop provided between the P gate diffusion layer and the anode diffusion layer are formed on the surface of the semiconductor substrate. A switching element in which a channel stopper diffusion layer is formed, and the diffusion depth of the channel stopper diffusion layer is greater than the depth of a P gate diffusion layer.
JP10877290U 1990-10-16 1990-10-16 Pending JPH0465461U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10877290U JPH0465461U (en) 1990-10-16 1990-10-16

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10877290U JPH0465461U (en) 1990-10-16 1990-10-16

Publications (1)

Publication Number Publication Date
JPH0465461U true JPH0465461U (en) 1992-06-08

Family

ID=31855894

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10877290U Pending JPH0465461U (en) 1990-10-16 1990-10-16

Country Status (1)

Country Link
JP (1) JPH0465461U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS562668A (en) * 1979-06-21 1981-01-12 Nec Corp Planar type thyristor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS562668A (en) * 1979-06-21 1981-01-12 Nec Corp Planar type thyristor

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