JPH0470732U - - Google Patents

Info

Publication number
JPH0470732U
JPH0470732U JP11354690U JP11354690U JPH0470732U JP H0470732 U JPH0470732 U JP H0470732U JP 11354690 U JP11354690 U JP 11354690U JP 11354690 U JP11354690 U JP 11354690U JP H0470732 U JPH0470732 U JP H0470732U
Authority
JP
Japan
Prior art keywords
pattern
reduction
projection exposure
measurement
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11354690U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11354690U priority Critical patent/JPH0470732U/ja
Publication of JPH0470732U publication Critical patent/JPH0470732U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の全体構成図、第2図は回路パ
ターンが描画されているレテイクルを示す図、第
3図はウエハ上に露光されたチツプ配列図、第4
図は理想格子座標に対し実測値をプロツトした図
である。 1……位置計測付X−Yステージ、2……縮小
投影レンズ、3……レテイクル微動台、4……ウ
エハ、5……パターン検出装置、6……露光光源
、7……データ処理装置、8……レテイクル、9
……X/Yターゲツトパターン。
Figure 1 is an overall configuration diagram of the present invention, Figure 2 is a diagram showing a reticle on which a circuit pattern is drawn, Figure 3 is a diagram of the chip arrangement exposed on a wafer, and Figure 4 is a diagram showing the arrangement of chips exposed on a wafer.
The figure shows actually measured values plotted against ideal grid coordinates. 1... X-Y stage with position measurement, 2... Reduction projection lens, 3... Reticle fine movement table, 4... Wafer, 5... Pattern detection device, 6... Exposure light source, 7... Data processing device, 8... Reticle, 9
...X/Y target pattern.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 縮小レンズとパターン検出光学系と位置計測付
X−Yステージと露光照明系および演算装置(記
憶装置付)よりなる縮小投影露光装置において、
ウエハ上に多数チツプ露光された、チツプ内のタ
ーゲツトをパターン位置検出器で測定し、この測
定を多数チツプくり返す事により理想格子に対す
るパターンの位置ずれを求め、データ処理するこ
とを特徴とする縮小投影露光装置。
In a reduction projection exposure apparatus consisting of a reduction lens, a pattern detection optical system, an X-Y stage with position measurement, an exposure illumination system, and an arithmetic unit (with a storage device),
A reduction method characterized by measuring a target in a chip exposed on a wafer with a pattern position detector, repeating this measurement for a number of chips to find the positional deviation of the pattern with respect to an ideal grid, and then processing the data. Projection exposure equipment.
JP11354690U 1990-10-31 1990-10-31 Pending JPH0470732U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11354690U JPH0470732U (en) 1990-10-31 1990-10-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11354690U JPH0470732U (en) 1990-10-31 1990-10-31

Publications (1)

Publication Number Publication Date
JPH0470732U true JPH0470732U (en) 1992-06-23

Family

ID=31861147

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11354690U Pending JPH0470732U (en) 1990-10-31 1990-10-31

Country Status (1)

Country Link
JP (1) JPH0470732U (en)

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