JPH0473292B2 - - Google Patents

Info

Publication number
JPH0473292B2
JPH0473292B2 JP58048115A JP4811583A JPH0473292B2 JP H0473292 B2 JPH0473292 B2 JP H0473292B2 JP 58048115 A JP58048115 A JP 58048115A JP 4811583 A JP4811583 A JP 4811583A JP H0473292 B2 JPH0473292 B2 JP H0473292B2
Authority
JP
Japan
Prior art keywords
layer
copper
chromium
electrode
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58048115A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59172745A (ja
Inventor
Mitsuo Kishimoto
Kenji Oka
Mitsuo Oomi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP58048115A priority Critical patent/JPS59172745A/ja
Publication of JPS59172745A publication Critical patent/JPS59172745A/ja
Publication of JPH0473292B2 publication Critical patent/JPH0473292B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials

Landscapes

  • Electrodes Of Semiconductors (AREA)
JP58048115A 1983-03-22 1983-03-22 半導体装置の電極形成方法 Granted JPS59172745A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58048115A JPS59172745A (ja) 1983-03-22 1983-03-22 半導体装置の電極形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58048115A JPS59172745A (ja) 1983-03-22 1983-03-22 半導体装置の電極形成方法

Publications (2)

Publication Number Publication Date
JPS59172745A JPS59172745A (ja) 1984-09-29
JPH0473292B2 true JPH0473292B2 (2) 1992-11-20

Family

ID=12794313

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58048115A Granted JPS59172745A (ja) 1983-03-22 1983-03-22 半導体装置の電極形成方法

Country Status (1)

Country Link
JP (1) JPS59172745A (2)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69412564T2 (de) * 1993-10-04 1998-12-24 Casio Computer Co., Ltd., Tokio/Tokyo Vorrichtung zur Messung einer Fahrzeugbewegung
JP2698827B2 (ja) * 1993-11-05 1998-01-19 カシオ計算機株式会社 バンプ電極を備えた半導体装置の製造方法
JP3449333B2 (ja) * 2000-03-27 2003-09-22 セイコーエプソン株式会社 半導体装置の製造方法
JP3480416B2 (ja) 2000-03-27 2003-12-22 セイコーエプソン株式会社 半導体装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54101263A (en) * 1978-01-26 1979-08-09 Nec Corp Semiconductor device
US4434434A (en) * 1981-03-30 1984-02-28 International Business Machines Corporation Solder mound formation on substrates

Also Published As

Publication number Publication date
JPS59172745A (ja) 1984-09-29

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