JPH0476054U - - Google Patents
Info
- Publication number
- JPH0476054U JPH0476054U JP1990120584U JP12058490U JPH0476054U JP H0476054 U JPH0476054 U JP H0476054U JP 1990120584 U JP1990120584 U JP 1990120584U JP 12058490 U JP12058490 U JP 12058490U JP H0476054 U JPH0476054 U JP H0476054U
- Authority
- JP
- Japan
- Prior art keywords
- surface mount
- utility
- scope
- registration request
- connection terminals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
第１図はこの考案の一実施例である表面実装用
ＩＣを示す断面図、第２図は第１図の表面実装用
ＩＣの底面図、第３図はこの考案の一実施例によ
る表面実装用ＩＣを複数個実装した時の上面図、
第４図は従来の表面実装用ＩＣを示す断面図、第
５図は従来の表面実装用ＩＣを複数個実装した時
の上面図である。 図において、１はチツプ、２はモールド、３は
ワイヤ、４は内部リード、５は金属パターン、６
は実装基板、８は半田、９は接続端子、１０はＩ
Ｃを示す。なお、図中、同一符号は同一、又は相
当部分を示す。
ＩＣを示す断面図、第２図は第１図の表面実装用
ＩＣの底面図、第３図はこの考案の一実施例によ
る表面実装用ＩＣを複数個実装した時の上面図、
第４図は従来の表面実装用ＩＣを示す断面図、第
５図は従来の表面実装用ＩＣを複数個実装した時
の上面図である。 図において、１はチツプ、２はモールド、３は
ワイヤ、４は内部リード、５は金属パターン、６
は実装基板、８は半田、９は接続端子、１０はＩ
Ｃを示す。なお、図中、同一符号は同一、又は相
当部分を示す。
Claims (1)
- ＩＣ底面に半田付け可能な金属で底面と同一面
上に接続端子を備えたことを特徴とする表面実装
用ＩＣ。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990120584U JPH0476054U (ja) | 1990-11-15 | 1990-11-15 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990120584U JPH0476054U (ja) | 1990-11-15 | 1990-11-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0476054U true JPH0476054U (ja) | 1992-07-02 |
Family
ID=31868483
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990120584U Pending JPH0476054U (ja) | 1990-11-15 | 1990-11-15 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0476054U (ja) |
-
1990
- 1990-11-15 JP JP1990120584U patent/JPH0476054U/ja active Pending