JPH05252013A - Output circuit - Google Patents

Abstract

(57) [Summary] [Object] An object of the present invention is to prevent transistors constituting an output stage of an output circuit from being turned on at the same time, thereby preventing a shoot-through current in the output stage of the output circuit. [Structure] The output circuit 100a newly includes a transistor Q1 whose base electrode is in an open state.
When the current supplied from the output circuit 100a to the inductance load L is inverted, the parasitic transistors QK1 and QK2 are turned on, but the base current of the transistor Q1 is subtracted and the transistor Q1 is turned on. Transistor Q
A current is supplied from the collector electrode of 1 to the base electrode of the transistor Q2. Therefore, the base current of the transistor Q2 is not drawn and the transistors Q2 and Q3 are turned off. Therefore, when the transistor Q4 turns on, the transistor Q3 turns off, so that the transistors Q3 and Q4
It is possible to prevent the electric current from penetrating.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an output circuit of a monolithic integrated circuit, and more particularly to an output stage of an output circuit which is generated when an output terminal is below a substrate (substrate) potential when switching an output transistor. It is used to prevent the through current of the transistor that constitutes the.

[0002]

2. Description of the Related Art A conventional output circuit will be described below with reference to FIG. The output circuits 300a and 300 shown in FIG.
b has an H-SW (switch) type output format.

As shown, the output circuit 300a
Is composed of a PNP type transistor Q12, NPN type transistors Q13 and Q14, resistors R11 and R12, and diodes D11 and D12. The emitter electrode of the NPN transistor Q13 and the collector electrode of the NPN transistor Q14 are connected to each other, and this connection point is connected to one end of an inductance load L such as a motor via a terminal A.

The other end of the inductance load L is connected to another output circuit 300b via a terminal B.
The output circuit 300b includes NPN type transistors Q15 and Q15.
16, PNP type transistor Q20 and resistors R14, R
13 and diodes D13 and D14.

In the output circuit shown in FIG. 3, when the NPN transistor Q13 is on, the NPN transistor Q16 is on, the NPN transistor Q14 is off, and the NPN transistor Q14 is off.
The type transistor Q15 is turned off. At this time, since the NPN transistors Q13 and Q16 are on, the emitter current of the output circuit 300a flows in the direction of the arrow (1) shown in FIG.

When reversing the direction of the current flowing through the inductance load L (hereinafter referred to as winding current), NP is used.
The N-type transistors Q14 and Q15 are turned on, and the NPN-type transistors Q13 and Q16 are turned off. However, the winding current is not immediately reversed, but is reversed after the reactive power stored in the inductance load L is discharged by the diodes D12 and D13.

Further, when reversing the winding current again, the NPN type transistors Q14 and Q15 are turned off,
The NPN type transistors Q13 and Q16 are turned on. Also in this case, after the reactive power stored in the inductance load L is discharged by the diodes D11 and D14, the winding current is inverted. After that, the same operation is repeated.

[0008]

When the NPN transistor Q13 is switched from ON to OFF, the diode D
The current flowing through 12 causes the potential of terminal A ("GND"-
Vf "forward voltage of diode D12") becomes lower than the substrate potential, and P ^{+ of the} substrate , PNP type transistor Q12
Base electrode of N ⁺ , NPN type transistor Q13 emitter electrode N ⁺ Parasitic transistor QK formed from
11 turns on.

By the operation of the parasitic transistor QK11,
The base current of the PNP transistor Q12 is drawn, and P
The NP transistor Q12 is turned on, the base current is supplied from the PNP transistor Q12 to the NPN transistor Q13, and the turning off of the NPN transistor Q13 is delayed. As a result, NPN transistors Q13 and Q1
4 are turned on at the same time, and a through current IK flows.

Also, when the NPN transistor Q15 is switched from on to off, P ^{+ of the} substrate , PNP type transistor Q20 base electrode N ⁺ , NPN type transistor Q15 emitter electrode N ⁺ Parasitic transistor QK11 'formed by is turned on. As a result, NPN
The type transistors Q15 and Q16 are turned on at the same time, and the through current IK 'flows in the NPN type transistors Q15 and Q16. The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an output circuit that prevents a through current of a transistor that forms an output stage of the output circuit.

[0011]

An output circuit is formed on a substrate, and a first transistor having a collector electrode supplied with a first voltage and a collector electrode connected to an emitter electrode of the first transistor. And a control signal is supplied to the base electrode and a second voltage is supplied to the emitter electrode, and the output stage is composed of a second transistor, and the cathode is the emitter electrode of the first transistor and the second transistor. A collector electrode is connected to the diode, a second voltage is supplied to the anode, and a first insulating region formed on the substrate, and the collector electrode is connected to the base electrode of the first transistor. And a third PNP-type transistor whose emitter electrode is supplied with the first voltage, and an insulating region in the vicinity of the first insulating region. It is formed, the first to the emitter electrode
Voltage is supplied to the collector electrode of the third electrode.
Is connected to the base electrode of the transistor, and the base electrode is provided with a PNP-type fourth transistor in an open state.

[0012]

In the output circuit having the above structure, the first transistor is turned on and the second transistor is turned off from the first state.
When the transistor of is switched off and the second transistor is switched on, the direction of the output current is reversed. For this reason, the collector electrode is formed by the base electrode of the transistor Q2, and the parasitic transistor whose emitter electrode is formed by the emitter electrode of the transistor Q3 is turned on, the base current of the fourth transistor is drawn, and the fourth transistor is drawn. Turns on. By turning on the fourth transistor,
Current is supplied from the collector electrode of the fourth transistor to the base electrode of the third transistor. Since the saturation voltage of the third transistor and the base-emitter voltage of the fourth transistor are equal, the third transistor is turned off.

Since the third transistor is turned off, the first transistor
No current is supplied to the base electrode of the first transistor, so that the first transistor is turned off. Therefore, when the second transistor is turned on, the first transistor is turned off promptly, so that the shoot-through current of the first and second transistors can be prevented.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Output circuits 100a and 100b according to an embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows an inductance load L of a motor or the like.
An inverter circuit that supplies a current to is shown. The output circuit 100a on the left side of FIG. 1 includes PNP-type transistors Q1 and Q2, NPN-type transistors Q3 and Q4 that form an output stage, resistors R1 and R2, and diodes D1 and D2. The diodes D1 and D2 are for quickly extinguishing the winding current when reversing the winding current of the inductance load L. The output signal of the output circuit 100a is supplied to one end of the inductance load L via the terminal A.

The emitter electrode of the PNP transistor Q1, one end of the resistor R1, the emitter electrode of the PNP transistor Q2, the collector electrode of the NPN transistor Q3,
The power supply voltage VDD is supplied to the cathode of the diode D1. The collector electrode of the PNP transistor Q1 and the other end of the resistor R1 are connected to the base electrode of the PNP transistor Q2.

The PNP transistor Q1 is formed in the isolation region formed near the isolation region (island region) where the output circuit 100a is formed as shown in FIG.

The collector electrode of the PNP transistor Q2 is connected to one end of the resistor R2 and the base electrode of the NPN transistor Q3. The other end of the resistor R2 is connected to the terminal A. The emitter electrode of the NPN transistor Q3 is connected to the collector electrode of the NPN transistor Q4 and the terminal A. The emitter electrode of the NPN transistor Q4 is grounded.

The anode of the diode D1 is connected to the terminal A. The cathode of the diode D2 is connected to the terminal A, and the anode of the diode D2 is grounded. The terminal A is connected to one end of the inductance load L.

On the other hand, at the other end of the inductance load L,
Another output circuit 100b is connected. Output circuit 10
0b is, like the output circuit 100a, PNP type transistors Q8 and Q10, NPN type transistors Q5 and Q6 forming the output stage, resistors R3 and R4, and diodes D3 and D.
It is composed of 4. The diodes D3 and D4 are for promptly extinguishing the winding current similarly to the diodes D1 and D2.

The power supply voltage VCC is supplied to the emitter electrode of the PNP type transistor Q8, one end of the resistor R3, the emitter electrode of the PNP type transistor Q10, the collector electrode of the NPN type transistor Q5, and the cathode of the diode D3. The collector electrode of the PNP transistor Q8 and the other end of the resistor R3 are connected to the base electrode of the PNP transistor Q10. The PNP transistor Q8 is formed in the isolation region formed near the isolation region (island region) in which the output circuit 100b is formed.

The collector electrode of the PNP type transistor Q10 is connected to one end of the resistor R4 and the base electrode of the NPN type transistor Q5. The other end of the resistor R4 is connected to the terminal B. The emitter electrode of the NPN type transistor Q5 is connected to the terminal B and the collector electrode of the NPN type transistor Q6. The emitter electrode of the NPN transistor Q6 is grounded. The anode of the diode D3 and the cathode of the diode D4 are connected to the terminal B, and the anode of the diode D4 is grounded.

Next, the output circuit 100 will be described with reference to the drawings.
The operations of a and 100b will be described. As in the conventional case, a control circuit (not shown) supplies complementary control signals for controlling the direction of the current flowing through the inductance load L to the base electrodes of the NPN transistors Q4 and Q6.

First, the NPN type transistors Q3 and Q6 are turned on by the control signal supplied to the base electrodes of the transistors Q4 and Q6, and the NPN type transistors Q4 and Q6 are turned on.
Consider the situation where 5 is set to off. At this time, a current flows from the power supply voltage VDD through the NPN transistor Q3, the terminal A, the inductance load L, the terminal B, and the NPN transistor Q6 in the direction of the arrow (1).

Next, when reversing the winding current, the NPN
The control signals supplied to the type transistors Q4 and Q6 are switched to turn on the NPN type transistor Q4 and turn off the NPN type transistor Q6. Then, since the reactive power stored in the inductance load L is discharged, the current in the arrow direction of (1) flows through the diode D2, the inductance load L and the diode D3. Diode D2
Since a current flows through the terminal A, the potential of the terminal A becomes "GND (ground level) -Vf (forward voltage of the diode D2)".

The potential of the terminal A is the potential "ground level -Vf.
(Forward voltage of diode D2) ”, which is
So the P of the substrate⁺ , Base voltage of transistor Q2
Pole N⁺ , NPN-type transistor Q3 emitter electrode N⁺
Turns on the parasitic transistor QK1 formed by
It

Further, P ^{+ of} the substrate , The base electrode N ⁺ of the PNP transistor Q1 , NPN type transistor Q3 emitter electrode N ⁺ The parasitic transistor QK2 formed by is turned on.

The parasitic transistor QK1 tries to draw the base current of the PNP type transistor Q2. However, since the turned-on parasitic transistor QK2 draws the base current of the PNP transistor Q1, the PNP transistor Q1
Turns on, and the PNP transistor Q1 becomes saturated. Saturation voltage of PNP transistor Q1 V _CESAT = Q
2 _VBE (Q2 _VBE : base-emitter voltage of PNP transistor Q2), so PNP transistor Q2
Turn off. Since the PNP transistor Q2 is turned off, the bias current stops flowing from the PNP transistor Q2 to the base electrode of the NPN transistor Q3, and N
The PN type transistor Q3 is turned off. Therefore, even if the NPN transistor Q4 is turned on, no current flows through the NPN transistors Q3 and Q4.

After the reactive power of the inductance load L is discharged, a current flows in the direction of the arrow (2) through the NPN transistor Q5, the terminal B, the inductance load L, the terminal A, and the NPN transistor Q4.

When reversing the winding current again, the NPN
Type transistor Q6 is turned on, NPN type transistor Q4
Turn off. At this time, a current flows from the diode D4 to the diode D1 due to the reactive power discharge. Therefore, the potential of the terminal B becomes "GND (ground level) -Vf (forward voltage of the diode D4)". Therefore, in this case, since the potential of the terminal B is the potential of the substrate, that is, the potential of the terminal B is lower than the potential of the substrate, the parasitic transistor Q is similar to the above case.
K1 ′ is turned on and tries to draw the base current of the PNP transistor Q10. However, since the parasitic transistor QK2 ′ is further turned on and the base current of the PNP type transistor Q8 is drawn, the PNP type transistor Q8 is turned on and P
The NP type transistor Q8 becomes saturated. Saturation voltage of PNP transistor Q8 V _CESAT = Q10 _VBE (Q1
0 _VBE : voltage between the base and emitter of the PNP transistor Q10), the PNP transistor Q10 is turned off. Since the PNP transistor Q10 is turned off,
The bias current stops flowing from the PNP transistor Q10 to the base electrode of the NPN transistor Q5,
The N-type transistor Q5 is turned off. Therefore, even if the NPN transistor Q6 turns on, the NPN transistor Q5
And no current flows through Q6.

As described above, according to the above configuration, P
NP type transistors Q1 and Q8 and parasitic transistor QK
2 and QK2 'cause the NPN transistor Q
3, Q4 and NPN type transistors Q5 and Q6 are not turned on at the same time. Therefore, the output circuit of the present application can realize circuit operation without through current.

The present invention is not limited to the above embodiment, but various modifications can be made. For example, H-SW (switch)
Although the case of the type motor drive circuit has been described, other types of motor drive circuits may be used as long as the purpose is a motor drive output circuit by an inductance load.

[0033]

According to the present invention, it is possible to prevent the upper and lower transistors forming the output stage of the output circuit from being turned on at the same time, and thereby to prevent the through current of the upper and lower output transistors.

[Brief description of drawings]

FIG. 1 is a diagram showing an output circuit according to an embodiment of the present invention.

FIG. 2 is a sectional view of the output circuit according to the embodiment.

FIG. 3 is a diagram showing a conventional output circuit.

[Explanation of symbols]

Q1 to Q6, Q8, Q10 ... Transistors, R1 to R
4 ... Resistors, D1-D4 diodes, QK1, QK2, Q
K1 ', QK2' ... parasitic transistor, A, B ... terminal,
L: load inductance.

Claims (2)

[Claims] 1. A first collector electrode formed on a substrate.
And a collector electrode connected to the emitter electrode of the first transistor, a control signal is supplied to the base electrode, and a second voltage is supplied to the emitter electrode. An output stage composed of two transistors, a cathode whose cathode is connected to the emitter electrode of the first transistor and a collector electrode of the second transistor, and a second voltage is supplied to the anode of the diode; A PNP type third transistor which is formed in the disposed first insulating region, has its collector electrode connected to the base electrode of the first transistor, and has its emitter electrode supplied with the first voltage. And a collector electrode that is formed in an insulating region near the first insulating region and has a first voltage supplied to its emitter electrode. The third is connected to the base electrode of the transistor, the output circuit, characterized in that the base electrode comprises a fourth transistor of the PNP type in an open state. 2. An output transistor forming an output stage, a first PNP transistor formed in a first insulating region and driving the output transistor, and a first PNP transistor provided in the vicinity of the first insulating region. A second insulating region and a collector electrode connected to the base electrode of the first PNP transistor and an emitter electrode connected to the emitter electrode of the first PNP transistor formed in the second insulating region. And an output circuit having a second PNP transistor whose base electrode is in an open state.