JPH0535637A - Microprocessor control circuit - Google Patents

Abstract

PURPOSE:To perform the DMA transfer of necessary control object selecting circuit information to a control object selecting circuit from other ROM and to change a control object circuit even after starting the operation, when it becomes necessary to select the control object circuit of the assembling different at the time of starting the operation. CONSTITUTION:The above circuit has a microprocessor 1, plural ROMs 2 and 3 to supply, to the microprocessor, a control instruction to control by the microprocessor 1, a circuit 4 which becomes the control object of the microprocessor, a DMA 5 to perform directly the memory transfer between the control object circuits of the microprocessor by the instruction of the microprocessor 1 while it is the control object of the microprocessor 1, and an electrically writable programmable logical circuit 6 to select the circuit which becomes the control object of the microprocessor by the instruction from the microprocessor.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microprocessor control circuit, and more particularly to a microprocessor control circuit that can change the microprocessor processing even after the microprocessor starts operating.

[0002]

2. Description of the Related Art As shown in FIG. 2, a conventional microprocessor control circuit includes a microprocessor 21, a ROM 22 for supplying control instructions to the microprocessor 21 for control, and a control for the microprocessor 21. Target circuit RAM 23, address signal 26 and control signal 2 from microprocessor 21
7 and a control target selection circuit 24 for selecting the control symmetry of the microprocessor 21. Here, the control target selection circuit 24 decodes a part of the address signal 26 and the control signal 27 from the microprocessor 21 and outputs a selection signal 28 or 29, so that only the circuit to be controlled can be controlled by the microprocessor. It has a function to make a state.

When the microprocessor execution condition peculiar to the microprocessor 21 is satisfied, the microprocessor 21 first outputs the execution start address. RO which supplies the microprocessor 21 with a control instruction for controlling the microprocessor 21 at the normal execution start address
Since M22 is arranged as a control target, in this case, the control target selection circuit 24 outputs the control target selection signal 28 to the ROM 22, and only the ROM 22 can be controlled by the microprocessor. Therefore, the microprocessor 21 reads the control command from the ROM 22,
An address signal 26 and a control signal 27 for selecting a circuit to be controlled by the control instruction are supplied to the control target selection circuit 24.
Output to. The control target selection circuit 24 decodes the address signal 26 and the control signal 27 from the microprocessor 21 and outputs a selection signal 29, so that only the RAM 23 can be controlled by the microprocessor. Therefore, the microprocessor 21 controls the RAM 23 and then outputs the control target selection signal 28 to the ROM 22 at the next execution address.

The microprocessor 21 repeats the above operation until one of the microprocessor stop conditions predetermined by the microprocessor is satisfied. When the microprocessor execution start condition is again satisfied, the address signal 26 and the control signal 27 for selecting the ROM 22 which is the control target circuit assigned to the execution start address are output to the control target selection circuit 24, and the processing is performed. To resume.

[0005]

In the conventional microprocessor control circuit described above, the control object selection circuit selects only one control object and puts it in a state in which the microprocessor can control, so that the microprocessor execution start condition is satisfied. At times, the processing is always executed from the circuit arranged at the execution start address, and it is impossible to change the processing after the operation is started.

[0006]

SUMMARY OF THE INVENTION A microprocessor control circuit of the present invention has a microprocessor, a ROM for supplying a control command for the microprocessor to control, and a control symmetry of the microprocessor. Control symmetry of the microprocessor, which is a control symmetry of the microprocessor, and DMA which performs direct memory transfer between the control symmetry circuit of the microprocessor according to an instruction of the microprocessor, and control symmetry of the microprocessor by an instruction from the microprocessor. And an electrically rewritable programmable logic circuit for selecting a circuit.

[0007]

The present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of an embodiment of the present invention. In the embodiment of FIG. 1, a microprocessor 1, a ROM 2 for supplying control instructions for the microprocessor 1 to control the microprocessor 1, and a microprocessor 1
Circuit RAM4, ROM3 to be controlled by the microprocessor 1, a DMA 5 for direct memory transfer between the control target circuits of the microprocessor 1 according to an instruction from the microprocessor 1, and an address signal 8 from the microprocessor 1 according to an instruction from the microprocessor 1. The control target selection circuit 6 is provided with an electrically rewritable programmable logic circuit for decoding the control signal 9 and selecting the control target of the microprocessor 1.

Next, the operation of this embodiment will be described. When the microprocessor execution condition peculiar to the microprocessor 1 is satisfied, the microprocessor 1 outputs an address signal 8 and a control signal 9 for selecting the ROM 2 which supplies the control instruction to the microprocessor 1 to the control target selection circuit 1. .. The control target selection circuit 6 decodes the address signal 8 and the control signal 9 and puts only the corresponding ROM 2 into a state in which the microprocessor 1 can control it. Therefore, the microprocessor 1 reads the control command from the ROM 2, decodes the address signal 8 and the control signal 9 for selecting the circuit to be controlled by the control command, and only the corresponding control target circuit, for example, the RAM 1 is processed by the microprocessor. 1 can be controlled. Therefore, microprocessor 1 is RAM1
To the ROM of the next execution address.
The selection signal 10 for 2 is output. The microprocessor 1 repeats the above operation until one of the microprocessor stop conditions predetermined for the microprocessor is satisfied.

When there is a combination of circuits that can be controlled by the microprocessor 1 that cannot be controlled at the same time, for example, a control program for the microprocessor 1 to control in advance. And control target selection circuit information for setting the ROM 3 as the execution start address is written. In this case, the control target selection circuit information is provided so that the control program previously written in the ROM 3 can be supplied to the microprocessor 1 when it becomes necessary after the start of operation based on the control program in the ROM 2 is started. In order to directly transfer the data to the memory 6, the command for controlling the DMA 5 is written in advance in the ROM 2,
The controlled object selection circuit 6 can be dynamically rewritten.

That is, the microprocessor 1 first sets D
The MA 5 is instructed to transfer the control target selection circuit information, which is previously written in the data area of the ROM 2, for example, for arranging the ROM 3 at the execution start address, to the control target selection circuit 6.

Next, a control target selection signal is output to the control target selection circuit 6 to put the control target selection circuit 6 in a writable state. The DMA 5 reads the control target selection circuit information from the ROM 3 and directly transfers the memory to the control target selection circuit 6. At this point, the microprocessor 1 cannot access any control target circuit.
When the control target selection circuit information by is completed, the DMA 5 interrupts the microprocessor 1 to terminate the processing, so that the microprocessor 1 restarts the processing according to the execution address of the interrupt processing. However, the circuit located at the execution address is already ROM3 here.
Therefore, the microprocessor sequentially reads the instructions from the ROM 3 and executes the control on the circuit to be controlled, for example, the RAM 4.

After the control target selection circuit 6 is rewritten, the microprocessor 1 executes at this time even when a predetermined microprocessor stop condition is satisfied and the microprocessor execution start condition is satisfied again. The control is executed according to the control instruction of the ROM 3 assigned to the start address.

[0013]

As described above, according to the present invention, it is necessary to select a control target circuit in a combination different from that at the start of operation by providing a control target selection circuit having an electrically rewritable programmable logic circuit and a DMA. In this case, the necessary control target selection circuit information can be DMA-transferred from another ROM to the control target selection circuit. Therefore, there is an effect that the control target circuit can be changed even during the operation time.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a block diagram of a conventional microprocessor control circuit.

[Explanation of symbols]

 1,21 Microprocessor 2,3,22 ROM 4,23 RAM 5 DMA 6,24 Control target selection circuit 7 Data signal 8 Address signal 9 Control signal 10-14 Selection signal

Claims (1)

[Claims] 1. A microprocessor, a ROM that supplies a control command for the microprocessor to control the microprocessor, a circuit that is control symmetrical to the microprocessor, and a control symmetrical to the microprocessor. DMA for direct memory transfer between control symmetrical circuits of the microprocessor according to instructions of the microprocessor, and electrically rewritable for selecting a circuit which becomes control symmetrical of the microprocessor according to an instruction from the microprocessor. A microprocessor control circuit having a programmable logic circuit.