JPH0546112B2 - - Google Patents
Info
- Publication number
- JPH0546112B2 JPH0546112B2 JP58134193A JP13419383A JPH0546112B2 JP H0546112 B2 JPH0546112 B2 JP H0546112B2 JP 58134193 A JP58134193 A JP 58134193A JP 13419383 A JP13419383 A JP 13419383A JP H0546112 B2 JPH0546112 B2 JP H0546112B2
- Authority
- JP
- Japan
- Prior art keywords
- superconductor
- wiring
- film
- josephson
- oxide film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/01—Manufacture or treatment
- H10N60/0912—Manufacture or treatment of Josephson-effect devices
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
Description
【発明の詳細な説明】
本発明はジヨセフソン効果素子のその製造方法
に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a Josephson effect device and a method for manufacturing the same.
従来ジヨセフソン効果素子は、第１図に示すご
とき構造より成るのが通例である。すなわち、絶
縁基板１の表面には第１の超電導膜による配線
２、その上の一部に形成した酸化膜からなるジヨ
セフソン接合３、該ジヨセフソン接合３上と基板
１上に第２の超電導膜による配線４が形成されて
成るのが通例であつた。 A conventional Josephson effect element usually has a structure as shown in FIG. That is, on the surface of the insulating substrate 1, there is a wiring 2 made of a first superconducting film, a Josephson junction 3 made of an oxide film formed on a part of the wiring 2, and a second superconducting film made of a second superconducting film on the Josephson junction 3 and the substrate 1. Usually, a wiring 4 was formed.
しかし、従来は、２つの超電導体配線間の重な
り部分、即ちジヨセフソン接合部に段差が生じる
ために、ジヨセフソン接合部の電気容量が大き
く、必ずしも高速動作ができないという欠点があ
つた。 However, in the past, a step was formed in the overlapping portion between two superconductor wirings, that is, at the Josephson junction, so the electric capacity of the Josephson junction was large, and high-speed operation was not necessarily possible.
本発明はかかる従来技術の欠点をなくし、ジヨ
セフソン接合部の電気容量が少なく高速動作が可
能であり、かつ信頼性の高いジヨセフソン効果素
子のその製造方法を提供することを目的とする。 SUMMARY OF THE INVENTION An object of the present invention is to eliminate the drawbacks of the prior art, and to provide a method for manufacturing a Josephson effect element that has a small electric capacity at a Josephson junction, can operate at high speed, and is highly reliable.
上記目的を達成するための本発明の基本的な構
成は、ジヨセフソン効果素子に於て、絶縁基板上
には超電導体配線が形成され、該超電導膜配線の
側面にジヨセフソン接合が形成されて成ることを
特徴とすること、及びジヨセフソン素子の製造方
法に於て、絶縁基板上には第１の超電導体配線が
形成され、該第１の超電導体配線表面に薄い酸化
膜を形成し、該酸化膜表面に第２の超電導体膜を
形成後、前記第１の超電導体配線上に第２の超電
導体膜と、第２の超電導体膜の配線としての不要
部分を図形状に除去することにより、第１の超電
導体配線側面と第２の超電導体配線側面の接合部
に前記酸化膜をジヨセフソン接合素子として形成
して成ることを特徴とする。 The basic structure of the present invention for achieving the above object is that in a Josephson effect element, a superconductor wiring is formed on an insulating substrate, and a Josephson junction is formed on the side surface of the superconducting film wiring. In the method for manufacturing a Josephson device, a first superconductor wiring is formed on an insulating substrate, a thin oxide film is formed on the surface of the first superconductor wiring, and the oxide film is After forming a second superconductor film on the surface, the second superconductor film is removed on the first superconductor wiring and unnecessary portions of the second superconductor film as wiring are removed in a figure shape. It is characterized in that the oxide film is formed as a Josephson junction element at the junction between the first superconductor wiring side surface and the second superconductor wiring side surface.
以下、実施例により本発明を詳述する。 Hereinafter, the present invention will be explained in detail with reference to Examples.
第２図は本発明の実施例を示すジヨセフソン効
果素子の断面図である。すなわち、絶縁基板１１
の表面には第１の超電導膜１２と第２の超電導膜
１４との側面における接合部にジヨセフソン接合
１３が形成されて成る。 FIG. 2 is a sectional view of a Josephson effect element showing an embodiment of the present invention. That is, the insulating substrate 11
A Josephson junction 13 is formed on the surface of the superconducting film 12 at the joint portion between the first superconducting film 12 and the second superconducting film 14 on the side surface.
第３図乃至第５図は本発明によるジヨセフソン
効果素子の製造方法を示す工程毎の断面図であ
る。すなわち、絶縁基板２１の表面には第１の超
電導体膜２２を形成後、ホト・エツチングにより
図形状となし、その表面を酸化処理により20A程
度の酸化膜２３を形成後、第２の超電導体膜２４
を表面に形成後、表面が平坦になるように平坦化
膜、例えばホト・レジスト膜２８を塗布し、ホ
ト・リゾグラフイー処理により図形処理し、イオ
ン・エツチングで表面を全面エツチすることによ
り第５図の如く超電導体配線２５，２７に挾まれ
たジヨセフソン接合２６が形成される。このフオ
トレジストを塗布し、被エツチング面が平坦にな
るように全面エツチ、即ち、エツチングバツクに
より平坦化膜、第２の超電導体膜及び第１の超電
導体膜上の酸化膜が取り除かれ、平坦な表面を有
するジヨセフソン効果素子が形成されるものであ
る。 3 to 5 are cross-sectional views showing each step of the method for manufacturing the Josephson effect element according to the present invention. That is, after forming the first superconductor film 22 on the surface of the insulating substrate 21, it is photo-etched into a pattern, and after forming an oxide film 23 of about 20A on the surface by oxidation treatment, the second superconductor film 22 is formed on the surface of the insulating substrate 21. membrane 24
After forming on the surface, a flattening film, such as a photoresist film 28, is applied so that the surface is flat, a pattern is processed by photolithography, and the entire surface is etched by ion etching, as shown in FIG. A Josephson junction 26 sandwiched between superconductor wirings 25 and 27 is formed as shown in FIG. This photoresist is applied, and the oxide film on the flattening film, the second superconductor film, and the first superconductor film is removed by etching back so that the surface to be etched becomes flat. A Josephson effect element having a surface having a similar shape is formed.
以上のように本発明は、高速動作が可能となる
薄い縦型のジヨセフソン接合部を形成するために
半導体基板上に第１の超電導配線を形成後、第１
の超電導配線の表面に電極の膜厚よりも薄い膜厚
を有する酸化膜を形成し、その後に第２の超電導
配線を基板と酸化膜を覆うように形成し、平坦化
膜を塗布した後に第１の超電導配線が露出するま
で平坦化膜の全面をエツチング・バツクすること
により微細な縦型のジヨセフソン接合部を有する
ジヨセフソン効果素子を形成するものでる。この
ような構成により、、ジヨセフソン接合を極めて
小さい面積で縦型に形成することにより、ジヨセ
フソン集積回路の集積度の向上や接合容量減少に
よる動作速度の向上を計ることができる効果があ
る。更に精度良く平坦化を行なうことが可能にな
るので信頼性の高いジヨセフソン効果素子を提供
することが可能となるという格別の効果を有す
る。 As described above, in the present invention, in order to form a thin vertical Josephson junction that enables high-speed operation, after forming a first superconducting wiring on a semiconductor substrate,
An oxide film having a thickness thinner than that of the electrode is formed on the surface of the superconducting wiring, and then a second superconducting wiring is formed to cover the substrate and the oxide film, and a planarizing film is applied, followed by a second superconducting wiring. By etching back the entire surface of the planarization film until the superconducting wiring No. 1 is exposed, a Josephson effect element having fine vertical Josephson junctions is formed. With this configuration, the Josephson junction is formed vertically in an extremely small area, thereby improving the degree of integration of the Josephson integrated circuit and increasing the operating speed by reducing the junction capacitance. Since it becomes possible to perform planarization with even higher precision, it has a special effect in that it becomes possible to provide a highly reliable Josephson effect element.
第１図は従来技術によるジヨセフソン効果素子
の断面図、第２図は本発明によるジヨセフソン効
果素子の断面図、第３図乃至第５図は本発明によ
るジヨセフソン効果素子の製造方法を示す断面図
である。
１，１１，２１……基板、２，４，１２，１
４，２２，２４，２５，２７……超電導体膜、
３，１３，２３，２６……薄い酸化膜あるいはジ
ヨセフソン接合、２８……レジスト膜。
FIG. 1 is a cross-sectional view of a Josephson effect device according to the prior art, FIG. 2 is a cross-sectional view of a Josephson effect device according to the present invention, and FIGS. 3 to 5 are cross-sectional views showing a method of manufacturing a Josephson effect device according to the present invention. be. 1, 11, 21...Substrate, 2, 4, 12, 1
4, 22, 24, 25, 27... superconductor film,
3, 13, 23, 26... thin oxide film or Josephson junction, 28... resist film.
Claims (1)
形成する工程、前記第１の超電導体配線の上面及
び側面に前記第１の超電導体配線よりも薄い膜厚
を有する酸化膜を形成する工程、前記酸化膜上か
ら前記絶縁基板上にかけて第２の超電導体配線を
形成する工程、前記第２の超電導体配線上に表面
が平坦化された平坦化膜を形成する工程、しかる
後に、前記第１の超電導体配線が露出するまで前
記平坦化膜、前記第２の超電導体配線及び前記酸
化膜をエツチング・バツクすることにより、前記
第１の超電導体配線の側面と前記第２の超電導体
配線の側面との間の前記酸化膜をジヨセフソン接
合とし、かつ前記第１の超電導体配線、前記ジヨ
セフソン接合および前記第２の超電導体配線の表
面を実質的に平坦とする工程を有することを特徴
とするジヨセフソン効果素子の製造方法。1. A step of selectively forming a first superconductor wiring on an insulating substrate, forming an oxide film having a thinner film thickness than the first superconductor wiring on the top and side surfaces of the first superconductor wiring. a step of forming a second superconductor wiring from above the oxide film to the insulating substrate; a step of forming a flattening film whose surface is flattened on the second superconductor wiring; By etching back the planarization film, the second superconductor interconnect, and the oxide film until the first superconductor interconnect is exposed, the side surface of the first superconductor interconnect and the second superconductor interconnect are removed. It is characterized by comprising the step of forming a Josephson junction in the oxide film between the side surface of the wiring and substantially flattening the surfaces of the first superconductor wiring, the Josephson junction, and the second superconductor wiring. A method for manufacturing a Josephson effect element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58134193A JPS6027178A (en) | 1983-07-22 | 1983-07-22 | Manufacturing method of Josephson effect element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58134193A JPS6027178A (en) | 1983-07-22 | 1983-07-22 | Manufacturing method of Josephson effect element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6027178A JPS6027178A (en) | 1985-02-12 |
| JPH0546112B2 true JPH0546112B2 (en) | 1993-07-13 |
Family
ID=15122604
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58134193A Granted JPS6027178A (en) | 1983-07-22 | 1983-07-22 | Manufacturing method of Josephson effect element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6027178A (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5471999A (en) * | 1977-11-19 | 1979-06-08 | Rikagaku Kenkyusho | Josephson effect element and method of fabricating same |
| JPS57196589A (en) * | 1981-05-28 | 1982-12-02 | Seiko Epson Corp | Manufacture of nonlinear element |
| JPS59182586A (en) * | 1983-04-01 | 1984-10-17 | Nippon Telegr & Teleph Corp <Ntt> | Josephson junction element |
-
1983
- 1983-07-22 JP JP58134193A patent/JPS6027178A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6027178A (en) | 1985-02-12 |
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