JPH0570339B2 - - Google Patents

Info

Publication number: JPH0570339B2
Authority: JP; Japan
Prior art keywords: signal; circuit; clock; carrier; generates
Prior art date: 1988-03-15
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Fee Related

Application number

JP63059390A

Other languages

English (en)

Japanese (ja)

Other versions

JPH01233936A (ja

Inventor

Eiichi Kobayashi

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

NEC Corp

Original Assignee

Nippon Electric Co Ltd

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1988-03-15

Filing date

1988-03-15

Publication date

1993-10-04

1988-03-15 Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd

1988-03-15 Priority to JP63059390A priority Critical patent/JPH01233936A/ja

1989-09-19 Publication of JPH01233936A publication Critical patent/JPH01233936A/ja

1993-10-04 Publication of JPH0570339B2 publication Critical patent/JPH0570339B2/ja

Status Granted legal-status Critical Current

Links

238000001514 detection method Methods 0.000 claims description 25
230000001360 synchronised effect Effects 0.000 claims description 18
230000005856 abnormality Effects 0.000 claims description 15
230000005540 biological transmission Effects 0.000 claims description 14
238000006243 chemical reaction Methods 0.000 claims description 13
230000008929 regeneration Effects 0.000 claims description 10
238000011069 regeneration method Methods 0.000 claims description 10
238000012544 monitoring process Methods 0.000 claims description 9
230000008054 signal transmission Effects 0.000 claims description 8
230000002159 abnormal effect Effects 0.000 claims description 5
238000010586 diagram Methods 0.000 description 7
238000000034 method Methods 0.000 description 6
230000001186 cumulative effect Effects 0.000 description 3
238000003780 insertion Methods 0.000 description 3
230000037431 insertion Effects 0.000 description 3
238000011084 recovery Methods 0.000 description 3
238000004891 communication Methods 0.000 description 2
230000000694 effects Effects 0.000 description 2
238000005516 engineering process Methods 0.000 description 1
230000010354 integration Effects 0.000 description 1

Landscapes

Synchronisation In Digital Transmission Systems (AREA)

JP63059390A 1988-03-15 1988-03-15 クロック信号伝送回路 Granted JPH01233936A (ja)

Priority Applications (1)

Application Number	Priority Date	Filing Date	Title
JP63059390A JPH01233936A (ja)	1988-03-15	1988-03-15	クロック信号伝送回路

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP63059390A JPH01233936A (ja)	1988-03-15	1988-03-15	クロック信号伝送回路

Publications (2)

Publication Number	Publication Date
JPH01233936A JPH01233936A (ja)	1989-09-19
JPH0570339B2 true JPH0570339B2 (da)	1993-10-04

Family

ID=13111909

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
JP63059390A Granted JPH01233936A (ja)	1988-03-15	1988-03-15	クロック信号伝送回路

Country Status (1)

Country	Link
JP (1)	JPH01233936A (da)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPH05316063A (ja) *	1992-05-12	1993-11-26	Fujitsu Ltd	周波数多重モデムの多重制御方式
CN100361434C (zh) *	2000-04-19	2008-01-09	富士通株式会社	Wdm网络中的光时钟信号分布系统

1988
- 1988-03-15 JP JP63059390A patent/JPH01233936A/ja active Granted

Also Published As

Publication number	Publication date
JPH01233936A (ja)	1989-09-19

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Legal Events

Date	Code	Title	Description
2003-10-04	LAPS	Cancellation because of no payment of annual fees