JPH0616511B2 - Method for manufacturing semiconductor device - Google Patents
Method for manufacturing semiconductor deviceInfo
- Publication number
- JPH0616511B2 JPH0616511B2 JP61252332A JP25233286A JPH0616511B2 JP H0616511 B2 JPH0616511 B2 JP H0616511B2 JP 61252332 A JP61252332 A JP 61252332A JP 25233286 A JP25233286 A JP 25233286A JP H0616511 B2 JPH0616511 B2 JP H0616511B2
- Authority
- JP
- Japan
- Prior art keywords
- emitter
- ion milling
- semiconductor device
- electrode
- base electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title claims description 11
- 238000000034 method Methods 0.000 title claims description 10
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 238000000992 sputter etching Methods 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 5
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 claims description 3
- 239000000460 chlorine Substances 0.000 claims description 3
- 229910052801 chlorine Inorganic materials 0.000 claims description 3
- 238000001312 dry etching Methods 0.000 claims description 2
- 238000000059 patterning Methods 0.000 claims description 2
- 229910021419 crystalline silicon Inorganic materials 0.000 claims 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 239000007789 gas Substances 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 239000002253 acid Substances 0.000 description 1
- XKRFYHLGVUSROY-UHFFFAOYSA-N argon Substances [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- -1 argon ions Chemical class 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Landscapes
- Electrodes Of Semiconductors (AREA)
- Bipolar Transistors (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は加速されたイオンにより半導体装置を製造する
方法に関する。TECHNICAL FIELD The present invention relates to a method of manufacturing a semiconductor device by accelerated ions.
半導体装置の製造工程はウェットプロセスからドライプ
ロセスと移ってきているがその中の電極形成工程もイオ
ンミリング法が主流になってきた。特に超高周波トラン
ジスタの様にエミッタ・ベース間距離が数μｍ程度とい
う構造に対してはウェットプロセスはサイドエッチ量の
コントロールが非常に難しく不安定であった。一方、イ
オンミリング法はサイドエッチ量の全んど無い条件が得
られるのでマスクパターン通りの寸法仕上りを得ること
が出来る様になった。The manufacturing process of a semiconductor device is shifting from a wet process to a dry process, and the ion milling method has become the mainstream also in the electrode forming process therein. In particular, for a structure in which the emitter-base distance is about several μm such as an ultra-high frequency transistor, the wet process is very difficult to control the side etch amount and is unstable. On the other hand, in the ion milling method, the condition that the side etch amount is almost zero is obtained, so that it becomes possible to obtain the dimensional finish according to the mask pattern.
上述した従来のイオンミリング法は第２図の如く数KVの
高電圧で加速されたアルゴンイオンが半導体基板主面に
垂直に当るためエッチングされた金属屑が約45゜方向に
飛散し段差部側壁に再付着してＥ・Ｂ間が電気的にショ
ートされるという欠点がある。In the conventional ion milling method described above, argon ions accelerated by a high voltage of several KV hit perpendicularly to the main surface of the semiconductor substrate as shown in FIG. There is a drawback that it is re-attached to and electrically short-circuited between E and B.
〔問題点を解決するための手段〕 本発明によれば、半導体基板上に電極を形成するのにイ
オンミリング法を用いる半導体装置の製造方法におい
て、エミッタ・ベース電極をイオンミリングによりパタ
ーニングする工程と、前記エミッタ・ベース電極をマス
クにして多結晶シリコンを塩素系ガスによりドライエッ
チングを行った後、イオンミリングにより前記エミッタ
・ベース電極間の金属屑を除去する工程とを含む半導体
装置の製造方法が得られる。[Means for Solving Problems] According to the present invention, in a method of manufacturing a semiconductor device using an ion milling method to form an electrode on a semiconductor substrate, a step of patterning an emitter / base electrode by ion milling, A method of manufacturing a semiconductor device, comprising the steps of: dry-etching polycrystalline silicon with a chlorine-based gas using the emitter / base electrode as a mask, and then removing metal debris between the emitter / base electrode by ion milling. can get.
次に、本発明について図面を参照して説明する。第１図
(a)〜(c)は本発明の一実施例の縦断面図である。１は半
導体基板、２はベース領域、３はエミッタ領域、４は絶
縁物、５は多結晶シリコン、６はエミッタ電極、７はベ
ース電極、８は再付着金属である。従来、イオンミリン
グを行うと、約45゜方向に被エッチング材が飛散してし
まう。（図(a)）が、この後エミッタ・ベース電極をマ
スクにして多結晶シリコンを塩素系ガスにてドライエッ
チングを行う。（図(b)）このとき、酸系のウェットエ
ッチではサイドエッチ量がコントロールが出来ないの
で、超高周波トランジスタのような目合せマージンの少
ないものは適用出来ない。次に、再度イオンミリング行
い金属屑８を除去する。（図(c)） 〔発明の効果〕 以上説明したように本発明は多結晶シリンコンをエッチ
ングすることによりエミッタ・ベース電極間が広くな
り、再度再付着してもショートしないという効果があ
る。Next, the present invention will be described with reference to the drawings. Fig. 1
(a)-(c) is a longitudinal section of one example of the present invention. 1 is a semiconductor substrate, 2 is a base region, 3 is an emitter region, 4 is an insulator, 5 is polycrystalline silicon, 6 is an emitter electrode, 7 is a base electrode, and 8 is a redeposited metal. Conventionally, when ion milling is performed, the material to be etched is scattered about 45 °. After that, as shown in FIG. 7A, the polycrystalline silicon is dry-etched with chlorine-based gas using the emitter / base electrode as a mask. (Fig. (B)) At this time, the amount of side etch cannot be controlled by acid-based wet etching, so it is not possible to apply an ultra-high frequency transistor with a small alignment margin. Next, ion milling is performed again to remove the metal scraps 8. (FIG. (C)) [Effects of the Invention] As described above, the present invention has an effect that the emitter-base electrodes are widened by etching polycrystalline sillcon, and that short-circuiting does not occur even when redeposited again.
第１図(a)〜(c)は本発明の製造工程を示す縦断面図、第
２図は従来のイオンミリングを行っているところの縦断
面図である。 １，１０……半導体基板、２，２０……ベース領域、
３，３０……エミッタ領域、４，４０……絶縁物、５，
５０……多結晶シリコン、６，６０……エミッタ電極、
７，７０……ベース電極、８，８０……再付着金属1 (a) to 1 (c) are longitudinal sectional views showing a manufacturing process of the present invention, and FIG. 2 is a longitudinal sectional view showing a conventional ion milling process. 1, 10 ... Semiconductor substrate, 2, 20 ... Base region,
3, 30 ... Emitter region, 4, 40 ... Insulator, 5,
50 ... polycrystalline silicon, 6,60 ... emitter electrode,
7,70 ... Base electrode, 8,80 ... Redeposited metal
Claims (1)
ミリング法を用いる半導体装置の製造方法において、エ
ミッタ・ベース電極をイオンミリングによりパターニン
グする工程と、前記エミッタ・ベース電極をマスクにし
て多結晶シリコンを塩素系ガスによりドライエッチング
を行った後、イオンミリングにより前記エミッタ・ベー
ス電極間の金属屑を除去する工程とを含むことを特徴と
する半導体装置の製造方法。1. A method of manufacturing a semiconductor device, which uses an ion milling method to form an electrode on a semiconductor substrate, comprising a step of patterning an emitter / base electrode by ion milling, and a step of using the emitter / base electrode as a mask. A step of dry etching crystalline silicon with a chlorine-based gas, and then removing metal scraps between the emitter and the base electrode by ion milling.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61252332A JPH0616511B2 (en) | 1986-10-22 | 1986-10-22 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61252332A JPH0616511B2 (en) | 1986-10-22 | 1986-10-22 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63104474A JPS63104474A (en) | 1988-05-09 |
| JPH0616511B2 true JPH0616511B2 (en) | 1994-03-02 |
Family
ID=17235794
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61252332A Expired - Lifetime JPH0616511B2 (en) | 1986-10-22 | 1986-10-22 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0616511B2 (en) |
-
1986
- 1986-10-22 JP JP61252332A patent/JPH0616511B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63104474A (en) | 1988-05-09 |
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