JPH0664659A - Embossed tape for semiconductor device - Google Patents
Embossed tape for semiconductor deviceInfo
- Publication number
- JPH0664659A JPH0664659A JP4217577A JP21757792A JPH0664659A JP H0664659 A JPH0664659 A JP H0664659A JP 4217577 A JP4217577 A JP 4217577A JP 21757792 A JP21757792 A JP 21757792A JP H0664659 A JPH0664659 A JP H0664659A
- Authority
- JP
- Japan
- Prior art keywords
- tape
- embossed
- semiconductor device
- embossed tape
- shape
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 14
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 abstract description 10
- 229910052742 iron Inorganic materials 0.000 abstract description 5
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 238000004049 embossing Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 239000008188 pellet Substances 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
Landscapes
- Packages (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体装置用エンボス
テープに関し、特にエンボステープの形状に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an embossed tape for semiconductor devices, and more particularly to the shape of the embossed tape.
【０００２】[0002]
【従来の技術】従来の半導体装置のテーピングは、リー
ドフレームにペレットをマウントしボンディングワイヤ
にて外部引き出しリードと電気的に接続した後、樹脂封
止，リード成形，電気的選別を合格した表面実装型半導
体装置を、図３（ａ），（ｂ）に示すようにエンボステ
ープ１のポケット部に一個づつ収納した後、ポケット部
を熱圧着によりカバーテープ２で覆っていた。上記カバ
ーテープのエンボステープへの熱圧着は、適度なカバー
テープの剥離強度が得られるように、熱圧着幅，位置を
考慮したコテ５を用いて実施していた。2. Description of the Related Art Conventional taping for semiconductor devices is surface mounting in which a pellet is mounted on a lead frame and electrically connected to an external lead by a bonding wire, and then resin sealing, lead molding, and electrical selection are passed. As shown in FIGS. 3 (a) and 3 (b), the type semiconductor devices were housed one by one in the pocket portion of the embossed tape 1, and then the pocket portion was covered with the cover tape 2 by thermocompression bonding. The thermocompression bonding of the cover tape to the embossed tape was carried out using a trowel 5 in consideration of the thermocompression bonding width and position so as to obtain an appropriate peel strength of the cover tape.
【０００３】[0003]
【発明が解決しようとする課題】この従来の半導体装置
のテーピングでは、適度な剥離強度を得るためのカバー
テープのエンボスへの熱圧着幅と位置は、テーピング装
置の加熱されたコテ形状で決められていた。このため小
型表面実装型半導体装置の場合、左右の熱圧着コテの幅
は０．５〜１．０ｍｍ程度で間隔も４ｍｍ程度にしなけ
ればならないため、左右のコテの平行度（熱圧着のバラ
ンス）及び位置を管理することが困難で、かつエンボス
テープのポケットの大きさに合わせコテ形状も変えなけ
ればならないという問題点があった。In this conventional taping of a semiconductor device, the width and position of thermocompression bonding to the embossment of the cover tape to obtain an appropriate peel strength are determined by the heated trowel shape of the taping device. Was there. For this reason, in the case of a small surface mounting type semiconductor device, the width of the left and right thermocompression bonding trowels must be about 0.5 to 1.0 mm, and the interval must also be about 4 mm. In addition, it is difficult to control the position, and the trowel shape must be changed according to the size of the embossed tape pocket.
【０００４】[0004]
【課題を解決するための手段】本発明の半導体装置用エ
ンボステープは、ポケット部を覆うためのカバーテープ
が接触する部分の一部分に溝及び段差を設け、これによ
り熱圧着幅及び位置が決められるようにしている。In the embossed tape for a semiconductor device of the present invention, a groove and a step are provided in a part of a portion which a cover tape for covering a pocket is in contact with, whereby the thermocompression bonding width and position are determined. I am trying.
【０００５】[0005]
【実施例】次に本発明について図面を参照して説明す
る。図１（ａ），（ｂ）は、本発明の第１の実施例を示
す平面図と断面図である。図に示すように、エンボステ
ープ１のカバーテープ２が熱圧着される部分の一部にエ
ンボステープの厚さの半分程度（約０．１ｍｍ）の溝３
（この部分は、カバーテープが熱圧着されない）を設け
てある。したがって、エンボステーフ１にカバーテープ
２を熱圧着する際、溝３により熱圧着の幅及び位置が決
められるため、テーピング装置の熱圧着用のコテ５は、
エンボステープ１に設けられた溝３により決定される熱
圧着幅及び位置を覆う形状であればよい。なお、７は送
り穴、８は半導体装置４を入れるポケットである。The present invention will be described below with reference to the drawings. 1 (a) and 1 (b) are a plan view and a sectional view showing a first embodiment of the present invention. As shown in the figure, a groove 3 of about half the thickness of the embossed tape (about 0.1 mm) is formed in a part of the embossed tape 1 where the cover tape 2 is thermocompression bonded.
(This portion is not covered with the cover tape by thermocompression bonding). Therefore, when the cover tape 2 is thermocompression-bonded to the embossed baffle 1, the width and position of the thermocompression-bonding are determined by the groove 3, so that the thermocompression-bonding trowel 5 of the taping device is
Any shape may be used as long as it covers the thermocompression bonding width and position determined by the groove 3 provided in the embossed tape 1. Reference numeral 7 is a feed hole, and 8 is a pocket into which the semiconductor device 4 is inserted.
【０００６】図２（ａ），（ｂ），（ｃ）は本発明の第
２の実施例を示す平面図と断面図である。この実施例は
図に示すようにエンボステープ１のポケット８のサイズ
が小さく熱圧着できる面積の大きいものに関しては溝３
を複数入れて部分的に熱圧着ができるようにしている。
又、エンボステープ１の各ポケット８間（この部分は本
来熱圧着される部分ではない）にも段差６を設けてカバ
ーテープ２が接触しないようにすることで、テーピング
装置の熱圧着用のコテ５′形状を図２（ｂ）に示すよう
に単純化できる。FIGS. 2A, 2B and 2C are a plan view and a sectional view showing a second embodiment of the present invention. In this embodiment, as shown in the drawing, when the size of the pocket 8 of the embossed tape 1 is small and the area for thermocompression bonding is large, the groove 3 is formed.
It is possible to partially thermocompress by inserting a plurality of.
Further, a step 6 is also provided between each pocket 8 of the embossed tape 1 (this portion is not a portion to be thermocompression-bonded originally) so that the cover tape 2 does not come into contact with it, so that a trowel for thermocompression bonding of a taping device is provided. The 5'shape can be simplified as shown in Figure 2 (b).
【０００７】[0007]
【発明の効果】以上説明したように本発明は、エンボス
テープ溝及び段差を設けることでエンボステープの形状
で熱圧着幅及び位置を決めることができ、またテーピン
グ装置の熱圧着用のコテの形状を単純化でき（コテの水
平度及び位置の管理が容易）、かつエンボステープの形
状によらずコテを統一化できる効果を有する。As described above, according to the present invention, the thermocompression bonding width and position can be determined by the shape of the embossing tape by providing the embossing tape groove and the step, and the shape of the trowel for thermocompression bonding of the taping device. It is possible to simplify the process (easy to control the level and position of the iron) and to standardize the iron regardless of the shape of the embossed tape.
【図１】（ａ），（ｂ）は本発明の第１の実施例の平面
図と断面図である。1A and 1B are a plan view and a sectional view of a first embodiment of the present invention.
【図２】（ａ）〜（ｃ）は本発明の第２の実施例の平面
図と断面図である。2A to 2C are a plan view and a sectional view of a second embodiment of the present invention.
【図３】（ａ），（ｂ）は従来の２つの例を示す断面図
である。3A and 3B are cross-sectional views showing two conventional examples.
１ エンボステープ ２ カバーテープ ３ 溝 ４ 半導体装置 ５ 熱圧着用コテ ７ 送り穴 ８ ポケット 1 Embossing tape 2 Cover tape 3 Groove 4 Semiconductor device 5 Iron for thermocompression bonding 7 Feed hole 8 Pocket
Claims (1)
に収納するためのポケット及び送り穴より構成されるエ
ンボステープにおいて、上記半導体装置が収納されるポ
ケット部を覆うためのカバーテープが接触する部分の一
部に溝を有することを特徴とする半導体装置用エンボス
テープ。1. An embossed tape composed of pockets and feed holes for accommodating the surface-mount type semiconductor devices one by one at equal intervals, and a cover tape for covering the pocket part for accommodating the semiconductor device contacts. An embossed tape for a semiconductor device having a groove in a part of the portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4217577A JPH0664659A (en) | 1992-08-17 | 1992-08-17 | Embossed tape for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4217577A JPH0664659A (en) | 1992-08-17 | 1992-08-17 | Embossed tape for semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0664659A true JPH0664659A (en) | 1994-03-08 |
Family
ID=16706464
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4217577A Pending JPH0664659A (en) | 1992-08-17 | 1992-08-17 | Embossed tape for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0664659A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2026051187A1 (en) * | 2024-09-04 | 2026-03-12 | 达迩科技（成都）有限公司 | Inspection assembly and visual inspection apparatus for semiconductor devices |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61232171A (en) * | 1985-03-27 | 1986-10-16 | 株式会社村田製作所 | Electronic part run |
-
1992
- 1992-08-17 JP JP4217577A patent/JPH0664659A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61232171A (en) * | 1985-03-27 | 1986-10-16 | 株式会社村田製作所 | Electronic part run |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2026051187A1 (en) * | 2024-09-04 | 2026-03-12 | 达迩科技（成都）有限公司 | Inspection assembly and visual inspection apparatus for semiconductor devices |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3026426B2 (en) | Resin-sealed semiconductor device, method of manufacturing the same, and mold structure thereof | |
| JPH0258345U (en) | ||
| KR850005152A (en) | Semiconductor device | |
| JPH0664659A (en) | Embossed tape for semiconductor device | |
| JP2525555Y2 (en) | Lead frame assembly for resin-sealed semiconductor device | |
| JPH01179411U (en) | ||
| JP3159555B2 (en) | Method for manufacturing power semiconductor device | |
| JPS6310625Y2 (en) | ||
| JPS61129416U (en) | ||
| JPH0345653U (en) | ||
| JPH1012802A (en) | Lead frame and semiconductor device using the same | |
| JPS6236299Y2 (en) | ||
| JPH0336478U (en) | ||
| JPS61182036U (en) | ||
| JPS6334510B2 (en) | ||
| JPH04201880A (en) | Embossed type carrier tape | |
| JPH0263548U (en) | ||
| JPS602839U (en) | Plastic packaging for semiconductor devices | |
| JPH0428448U (en) | ||
| JPS6237935U (en) | ||
| JPH0446552U (en) | ||
| JPH0244352U (en) | ||
| JPH04162455A (en) | Resin-sealed semiconductor device | |
| KR19990038731U (en) | Semiconductor multi-pin package | |
| JPS6397241U (en) |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 19980818 |