JPH0697352A - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JPH0697352A JPH0697352A JP27241392A JP27241392A JPH0697352A JP H0697352 A JPH0697352 A JP H0697352A JP 27241392 A JP27241392 A JP 27241392A JP 27241392 A JP27241392 A JP 27241392A JP H0697352 A JPH0697352 A JP H0697352A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- inner lead
- resin
- semiconductor device
- lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、樹脂封止型半導体装
置、特にインナーリードと半導体チップのエッジとの間
のショート不良が発生する虞れがなく、また半導体チッ
プとリードとの接合部に加わる熱ストレスを緩和するこ
とができる樹脂封止型半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-encapsulated semiconductor device, and in particular, there is no fear that a short circuit between the inner lead and the edge of the semiconductor chip will occur, and the joint between the semiconductor chip and the lead will not occur. The present invention relates to a resin-encapsulated semiconductor device capable of relieving applied thermal stress.
【0002】[0002]
【従来の技術】図5(A)及び(B)は樹脂封止型半導
体装置の従来例を示すもので、(A)は一部切欠斜視
図、(B)は(A)のB−B線視断面図である。図5に
おいて、1は半導体チップ、2、2、…は該半導体チッ
プ1に形成された電極、3、3、…はバンプ、4、4、
…は一端が該バンプ3、3、…を介して半導体チップの
電極2、2、…に接続されたインナーリードで、例えば
銅からなる。2. Description of the Related Art FIGS. 5A and 5B show a conventional example of a resin-sealed semiconductor device. FIG. 5A is a partially cutaway perspective view, and FIG. FIG. In FIG. 5, 1 is a semiconductor chip, 2, 2, ... Are electrodes formed on the semiconductor chip 1, 3, 3, ... Are bumps, 4, 4,
Is an inner lead whose one end is connected to the electrodes 2, 2, ... Of the semiconductor chip through the bumps 3, 3 ,.
【0003】5、5、…はインナーリード4、4、、…
の他端に形成された例えばアルミニウムからなる中間材
(エッチングストッパ)で、インナーリード4、4、…
の該他端には該中間材5、5、…を介してアウターリー
ド6、6、…の一端が接続されている。尚、インナーリ
ード4、4、…とアウターリード6、6、…からなるリ
ードフレームの製造方法については、本願出願人会社か
ら特願平3−306669号等により各種提案が為され
ている。7は封止樹脂である。従来の樹脂封止型半導体
装置は、図5に示すように、インナーリード4、4、…
が水平方向(平面方向)に延びていた。The inner leads 4, 4, ...
An intermediate material (etching stopper) made of, for example, aluminum and formed on the other end of the inner leads 4, 4, ...
One end of the outer leads 6, 6, ... Is connected to the other end of the outer lead 6 through the intermediate members 5, 5 ,. Incidentally, various proposals have been made by the applicant of the present application, for example, in Japanese Patent Application No. 3-306669, regarding a method of manufacturing a lead frame composed of the inner leads 4, 4, ... And the outer leads 6, 6 ,. 7 is a sealing resin. As shown in FIG. 5, the conventional resin-encapsulated semiconductor device has inner leads 4, 4 ,.
Was extending in the horizontal direction (plane direction).
【0004】[0004]
【発明が解決しようとする課題】ところで、図5に示す
従来の樹脂封止型半導体装置は、インナーリード4、
4、…が水平方向(平面方向)に延びていたので、半導
体チップ1のエッジとインナーリード4との間で接触が
生じ易く、ショート不良の発生率が無視できない程高
く、樹脂封止型半導体装置の小型化、薄型化に応えよう
とする程その発生率が高くなる傾向にあった。By the way, the conventional resin-encapsulated semiconductor device shown in FIG.
.. extend in the horizontal direction (planar direction), contact easily occurs between the edge of the semiconductor chip 1 and the inner lead 4, and the occurrence rate of short circuit defects is so high that it cannot be ignored. As the size and thickness of the device were reduced, the occurrence rate tended to increase.
【0005】また、半導体チップ1とリード4とは線熱
膨張係数に大きな違いがあるので、インナーリード4を
水平に形成すると熱応力がインナーリード4と半導体チ
ップ1の電極2とのバンプ3を介しての接合部に加わ
り、その接合部あるいはその近傍部分がダメージを受け
るという問題があった。Since the semiconductor chip 1 and the lead 4 have a large difference in linear thermal expansion coefficient, when the inner lead 4 is formed horizontally, thermal stress causes the bump 3 between the inner lead 4 and the electrode 2 of the semiconductor chip 1 to be generated. There is a problem that the joint or the vicinity thereof is damaged by being added to the joint.
【0006】本発明はこのような問題点を解決すべく為
されたものであり、半導体チップのエッジとインナーリ
ードとのショート不良をなくし、かつ半導体チップとイ
ンナーリードの接合部に熱応力が集中するのを防止する
ことを目的とする。The present invention has been made to solve the above problems, eliminates a short circuit defect between the edge of the semiconductor chip and the inner lead, and concentrates thermal stress on the joint between the semiconductor chip and the inner lead. The purpose is to prevent.
【0007】[0007]
【課題を解決するための手段】請求項1の樹脂封止型半
導体装置は、半導体チップの各電極に接続したインナー
リードを外側に行くに従って該半導体チップから離れる
方向に斜めに延びるように形成したことを特徴とする。
請求項2の樹脂封止型半導体装置は、請求項1の樹脂封
止型半導体装置において、各インナーリードのアウター
リードと接続された外端部表面が封止樹脂の表面から露
出せしめられてなることを特徴とする。According to another aspect of the present invention, there is provided a resin-encapsulated semiconductor device, wherein inner leads connected to respective electrodes of a semiconductor chip are formed to extend obliquely in a direction away from the semiconductor chip toward the outside. It is characterized by
The resin-encapsulated semiconductor device according to a second aspect is the resin-encapsulated semiconductor device according to the first aspect, wherein the outer end surface of each inner lead connected to the outer lead is exposed from the surface of the encapsulating resin. It is characterized by
【0008】[0008]
【作用】請求項1の樹脂封止型半導体装置によれば、イ
ンナーリードが外側に行くに従って該半導体チップから
離れる方向に斜めに延びているので、半導体チップのエ
ッジとショートする虞れがなくなるし、また、熱ストレ
スをインナーリードが曲ることによって吸収して熱スト
レスのインナーリードと半導体チップの電極との接合部
への集中を防止することができる。請求項2の樹脂封止
型半導体装置によれば、インナーリードの外端を露出せ
しめたので封止樹脂を徒らに厚くすることなく半導体チ
ップのエッジとインナーリードとのショート不良防止、
熱ストレスのインナーリードと半導体チップの電極との
接合部への集中を防止することができる。According to the resin-sealed semiconductor device of the first aspect, since the inner lead extends obliquely in the direction away from the semiconductor chip as it goes outward, there is no risk of short-circuiting with the edge of the semiconductor chip. Also, the thermal stress can be absorbed by the bending of the inner lead, and the thermal stress can be prevented from concentrating on the joint between the inner lead and the electrode of the semiconductor chip. According to the resin-sealed semiconductor device of claim 2, since the outer end of the inner lead is exposed, the short circuit between the edge of the semiconductor chip and the inner lead is prevented without excessively increasing the thickness of the sealing resin.
It is possible to prevent heat stress from concentrating on the joint between the inner lead and the electrode of the semiconductor chip.
【0009】[0009]
【実施例】以下、本発明樹脂封止型半導体装置を図示実
施例に従って詳細に説明する。図1(A)、(B)は本
発明樹脂封止型半導体装置の一つの実施例を示すもの
で、(A)は斜視図、(B)は(A)のB−B線視断面
図である。本実施例は、図5(A)、(B)に示した樹
脂封止型半導体装置の従来例とは、半導体チップ1の各
電極2に接続したインナーリード4を外側に行くに従っ
て該半導体チップ1から離れる方向に斜めに延びるよう
に形成した点及び各インナーリード4のアウターリード
6と接続された端部表面が封止樹脂6から露出せしめら
れてなることを特徴とする点で相違するが、それ以外の
点では共通し、共通点については既に説明済みなのでそ
の説明は省略し、相違する点についてのみ説明する。ま
た、全図を通して共通部分には共通の符号を使用した。The resin-encapsulated semiconductor device of the present invention will be described in detail below with reference to the illustrated embodiments. 1A and 1B show one embodiment of a resin-encapsulated semiconductor device of the present invention. FIG. 1A is a perspective view, and FIG. 1B is a sectional view taken along line BB of FIG. Is. This embodiment is different from the conventional example of the resin-encapsulated semiconductor device shown in FIGS. 5A and 5B in that the inner lead 4 connected to each electrode 2 of the semiconductor chip 1 goes outward as the semiconductor chip 1, but is characterized in that it is formed so as to extend obliquely in the direction away from 1, and that the end surface of each inner lead 4 connected to the outer lead 6 is exposed from the sealing resin 6. The other points are common, and the common points have already been described, so description thereof will be omitted and only different points will be described. Also, common symbols are used for common parts throughout the drawings.
【0010】本樹脂封止型半導体装置のインナーリード
4は、バンプ3を介して半導体チップ1の電極2に接続
された内端から外側へ行くに従って半導体チップ1から
離れる方向に斜めに、即ち斜め上方に延びるように形成
されている。そして、インナーリード4の外端は、下面
が中間材5を介してアウターリード6の上面に接続され
ており、上面が封止樹脂7の上面と同一平面を成すよう
に露出せしめられている。The inner leads 4 of the present resin-sealed semiconductor device are slanted, that is, slanted in a direction away from the semiconductor chip 1 from the inner end connected to the electrode 2 of the semiconductor chip 1 via the bump 3 to the outer side. It is formed so as to extend upward. The lower end of the outer end of the inner lead 4 is connected to the upper face of the outer lead 6 via the intermediate member 5, and the upper face is exposed so as to be flush with the upper face of the sealing resin 7.
【0011】従って、本樹脂封止型半導体装置によれ
ば、先ず第1に、インナーリード4が内端から外側へ行
くに従って半導体チップ1から離れる方向に斜めに、即
ち斜め上方に延びるように形成されているので、インナ
ーリード4と半導体チップ1のエッジとのショート事故
が生じにくい。尚、斜め上方に延びるインナーリード4
の半導体チップ1表面に対する角度θは図1の樹脂封止
型半導体装置の各別の変形例を示す図2(A)、(B)
のように小さくしたり大きくしたり任意に選択すること
ができる。Therefore, according to the present resin-encapsulated semiconductor device, first, the inner lead 4 is formed so as to extend obliquely in the direction away from the semiconductor chip 1 as it goes from the inner end to the outer side, that is, obliquely upward. Therefore, the short circuit between the inner lead 4 and the edge of the semiconductor chip 1 is unlikely to occur. The inner lead 4 extending diagonally upward
2 with respect to the surface of the semiconductor chip 1 is shown in FIGS. 2 (A) and 2 (B) showing different modifications of the resin-sealed semiconductor device of FIG.
It can be arbitrarily selected to be small or large as shown in.
【0012】第2に、インナーリード4が半導体チップ
1の平面方向と平行に延びるのではなく斜め上方に延び
るように形成されているのでインナーリード4のバンプ
3を介して半導体チップ1の電極2との接合部に熱スト
レスがかかる虞れはない。即ち、半導体チップ1の線熱
膨張係数は2.3×10-6/℃、封止樹脂7の線熱膨張
係数は2.0×10-5/℃、インナーリード(銅)の線
熱膨張係数は1.7×10-5/℃であり、半導体チップ
1とインナーリード4との間には線熱膨張係数に相当に
大きな差がある。Secondly, since the inner leads 4 are formed so as not to extend in parallel to the plane direction of the semiconductor chip 1 but to extend obliquely upward, the electrodes 2 of the semiconductor chip 1 are interposed via the bumps 3 of the inner leads 4. There is no risk of heat stress being applied to the joint portion with. That is, the linear thermal expansion coefficient of the semiconductor chip 1 is 2.3 × 10 −6 / ° C., the linear thermal expansion coefficient of the sealing resin 7 is 2.0 × 10 −5 / ° C., the linear thermal expansion of the inner lead (copper) is The coefficient is 1.7 × 10 −5 / ° C., and there is a considerable difference in the coefficient of linear thermal expansion between the semiconductor chip 1 and the inner lead 4.
【0013】従って、図3(B)に示す従来のようにイ
ンナーリード4が半導体チップ1の平面方向と平行に延
びている場合には、熱ストレスがインナーリード4と半
導体チップ1の接合点にもろに加わり、その接合点及び
その近傍に不良が発生し易くなる。しかるに、本樹脂封
止型半導体装置によればインナーリード4が斜め上方に
延びているので、線熱膨張係数の違いによる熱ストレス
が半導体チップ1の平面方向と平行に作用したとき図3
(A)に示すようにインナーリード4が撓み度合を変え
る変形によってその熱ストレスを吸収することができ、
延いては熱ストレスがインナーリード4と半導体チップ
1の接合点に集中することを回避することできる。Therefore, when the inner lead 4 extends parallel to the plane direction of the semiconductor chip 1 as in the conventional case shown in FIG. 3B, thermal stress is applied to the junction point between the inner lead 4 and the semiconductor chip 1. In addition to defects, defects are likely to occur at the joint and its vicinity. However, according to the present resin-encapsulated semiconductor device, since the inner lead 4 extends obliquely upward, when the thermal stress due to the difference in the linear thermal expansion coefficient acts in parallel with the plane direction of the semiconductor chip 1, FIG.
As shown in (A), the inner lead 4 can absorb the heat stress by the deformation that changes the degree of bending,
Consequently, it is possible to prevent the heat stress from concentrating on the joint point between the inner lead 4 and the semiconductor chip 1.
【0014】そして、インナーリード4の外端部上面が
封止樹脂7から露出した構造を採っているので、封止樹
脂7を徒らに厚くすることなく上述したインナーリード
4と半導体チップ1のエッジとのショート防止効果、熱
ストレス吸収効果を得ることができる。Since the upper surface of the outer end portion of the inner lead 4 is exposed from the sealing resin 7, the inner lead 4 and the semiconductor chip 1 described above can be formed without excessively thickening the sealing resin 7. It is possible to obtain a short-circuit prevention effect with the edge and a heat stress absorption effect.
【0015】図4は本発明樹脂封止型半導体装置の他の
実施例を示す断面図である。本実施例は半導体チップ1
の底面が露出した点でのみ図1に示す実施例と異なって
いる。本実施例によれば半導体チップ1の底面が露出す
るようにしたので封止樹脂7の厚さをより薄くすること
ができ、樹脂封止型半導体装置のより一層の薄型化を図
ることが可能になると共に、半導体チップ1内で発生し
た熱を底面から直接外部に放熱することができ、より放
熱性を高めることができる。FIG. 4 is a sectional view showing another embodiment of the resin-sealed semiconductor device of the present invention. This embodiment is a semiconductor chip 1.
1 is different from the embodiment shown in FIG. 1 only in that the bottom surface of the is exposed. According to this embodiment, since the bottom surface of the semiconductor chip 1 is exposed, the thickness of the sealing resin 7 can be made thinner, and the resin-sealed semiconductor device can be made even thinner. At the same time, the heat generated in the semiconductor chip 1 can be radiated to the outside directly from the bottom surface, so that the heat radiation property can be further improved.
【0016】[0016]
【発明の効果】請求項1の樹脂封止型半導体装置は、半
導体チップの各電極に接続したインナーリードを外側に
行くに従って該半導体チップから離れる方向に斜めに延
びるように形成したことを特徴とするものである。従っ
て、請求項1の樹脂封止型半導体装置によれば、インナ
ーリードが外側に行くに従って該半導体チップから離れ
る方向に斜めに延びているので、半導体チップのエッジ
とショートする虞れがなくなるし、また、熱ストレスを
インナーリードが曲ることによって吸収して熱ストレス
のインナーリードと半導体チップの電極との接合部への
集中を防止することができる。The resin-sealed semiconductor device according to the present invention is characterized in that the inner leads connected to the respective electrodes of the semiconductor chip are formed so as to extend obliquely in a direction away from the semiconductor chip as it goes outside. To do. Therefore, according to the resin-encapsulated semiconductor device of claim 1, since the inner lead extends obliquely in the direction away from the semiconductor chip as it goes outward, there is no risk of short-circuiting with the edge of the semiconductor chip. In addition, the thermal stress can be absorbed by the bending of the inner lead, and the thermal stress can be prevented from concentrating on the joint between the inner lead and the electrode of the semiconductor chip.
【0017】請求項2の樹脂封止型半導体装置は、各イ
ンナーリードのアウターリードと接続された端部表面が
封止樹脂から露出せしめられてなることを特徴とする。
従って、請求項2の樹脂封止型半導体装置によれば、イ
ンナーリードの外端を露出せしめたので封止樹脂を徒ら
に厚くすることなく半導体チップのエッジとインナーリ
ードとのショート不良防止、熱ストレスのインナーリー
ドと半導体チップの電極との接合部への集中を防止する
ことができる。A resin-sealed semiconductor device according to a second aspect of the invention is characterized in that the end surface of each inner lead connected to the outer lead is exposed from the sealing resin.
Therefore, according to the resin-sealed semiconductor device of the second aspect, since the outer end of the inner lead is exposed, the short circuit between the edge of the semiconductor chip and the inner lead can be prevented without unnecessarily increasing the thickness of the sealing resin. It is possible to prevent heat stress from concentrating on the joint between the inner lead and the electrode of the semiconductor chip.
【図1】(A)、(B)は本発明樹脂封止型半導体装置
の一つの実施例を示すもので、(A)は斜視図、(B)
は(A)のB−B線視断面図である。1A and 1B show an embodiment of a resin-encapsulated semiconductor device of the present invention, FIG. 1A being a perspective view, and FIG.
FIG. 7A is a sectional view taken along line BB of FIG.
【図2】(A)、(B)は図1の樹脂封止型半導体装置
の各別の変形例を示す断面図である。FIGS. 2A and 2B are cross-sectional views showing different modified examples of the resin-encapsulated semiconductor device of FIG.
【図3】(A)、(B)は本発明樹脂封止型半導体装置
の熱ストレス吸収効果を従来の樹脂封止型半導体装置の
場合と比較して説明する断面図、(A)は本発明の場合
を、(B)は従来例の場合を示す。3A and 3B are cross-sectional views for explaining the thermal stress absorption effect of the resin-encapsulated semiconductor device of the present invention in comparison with the case of a conventional resin-encapsulated semiconductor device, and FIG. In the case of the invention, (B) shows the case of the conventional example.
【図4】本発明樹脂封止型半導体装置の他の実施例を示
す断面図である。FIG. 4 is a cross-sectional view showing another embodiment of the resin-encapsulated semiconductor device of the present invention.
【図5】(A)、(B)は従来例を示し、(A)は斜視
図、(B)は(A)のB−B線視断面図である。5A and 5B show a conventional example, FIG. 5A is a perspective view, and FIG. 5B is a sectional view taken along line BB of FIG.
1 半導体チップ 2 電極 4 インナーリード 6 アウターリード 7 封止樹脂 1 semiconductor chip 2 electrode 4 inner lead 6 outer lead 7 sealing resin
Claims (2)
たインナーリードが外側へ行くに従って上記半導体チッ
プから離れる方向に斜めに延び、 各インナーリードの外端部にアウターリードが接続され
たことを特徴とする樹脂封止型半導体装置1. An inner lead whose inner end is connected to each electrode of a semiconductor chip extends obliquely in a direction away from the semiconductor chip as it goes outward, and an outer lead is connected to an outer end of each inner lead. Resin-sealed semiconductor device characterized by
続された端部表面が封止樹脂から露出せしめられてなる
ことを特徴とする請求項1記載の樹脂封止型半導体装置2. The resin-encapsulated semiconductor device according to claim 1, wherein the end surface of each inner lead connected to the outer lead is exposed from the encapsulating resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27241392A JP3232696B2 (en) | 1992-09-14 | 1992-09-14 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27241392A JP3232696B2 (en) | 1992-09-14 | 1992-09-14 | Resin-sealed semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0697352A true JPH0697352A (en) | 1994-04-08 |
| JP3232696B2 JP3232696B2 (en) | 2001-11-26 |
Family
ID=17513565
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP27241392A Expired - Fee Related JP3232696B2 (en) | 1992-09-14 | 1992-09-14 | Resin-sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3232696B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6716670B1 (en) | 2002-01-09 | 2004-04-06 | Bridge Semiconductor Corporation | Method of forming a three-dimensional stacked semiconductor package device |
| US6936495B1 (en) | 2002-01-09 | 2005-08-30 | Bridge Semiconductor Corporation | Method of making an optoelectronic semiconductor package device |
| US6987034B1 (en) | 2002-01-09 | 2006-01-17 | Bridge Semiconductor Corporation | Method of making a semiconductor package device that includes singulating and trimming a lead |
| US7190060B1 (en) | 2002-01-09 | 2007-03-13 | Bridge Semiconductor Corporation | Three-dimensional stacked semiconductor package device with bent and flat leads and method of making same |
-
1992
- 1992-09-14 JP JP27241392A patent/JP3232696B2/en not_active Expired - Fee Related
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6716670B1 (en) | 2002-01-09 | 2004-04-06 | Bridge Semiconductor Corporation | Method of forming a three-dimensional stacked semiconductor package device |
| US6774659B1 (en) | 2002-01-09 | 2004-08-10 | Bridge Semiconductor Corporation | Method of testing a semiconductor package device |
| US6803651B1 (en) | 2002-01-09 | 2004-10-12 | Bridge Semiconductor Corporation | Optoelectronic semiconductor package device |
| US6891276B1 (en) * | 2002-01-09 | 2005-05-10 | Bridge Semiconductor Corporation | Semiconductor package device |
| US6908794B1 (en) | 2002-01-09 | 2005-06-21 | Bridge Semiconductor Corporation | Method of making a semiconductor package device that includes a conductive trace with recessed and non-recessed portions |
| US6936495B1 (en) | 2002-01-09 | 2005-08-30 | Bridge Semiconductor Corporation | Method of making an optoelectronic semiconductor package device |
| US6987034B1 (en) | 2002-01-09 | 2006-01-17 | Bridge Semiconductor Corporation | Method of making a semiconductor package device that includes singulating and trimming a lead |
| US6989295B1 (en) | 2002-01-09 | 2006-01-24 | Bridge Semiconductor Corporation | Method of making a semiconductor package device that includes an insulative housing with first and second housing portions |
| US6989584B1 (en) | 2002-01-09 | 2006-01-24 | Bridge Semiconductor Corporation | Semiconductor package device that includes a conductive trace with a routing line, a terminal and a lead |
| US7009309B1 (en) | 2002-01-09 | 2006-03-07 | Bridge Semiconductor Corporation | Semiconductor package device that includes an insulative housing with a protruding peripheral portion |
| US7190060B1 (en) | 2002-01-09 | 2007-03-13 | Bridge Semiconductor Corporation | Three-dimensional stacked semiconductor package device with bent and flat leads and method of making same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3232696B2 (en) | 2001-11-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2003086737A (en) | Semiconductor device | |
| JPH09260550A (en) | Semiconductor device | |
| US20240404983A1 (en) | Method for Fabricating a Semiconductor Device | |
| JPH0697352A (en) | Resin-sealed semiconductor device | |
| KR950006970B1 (en) | Semiconductor device and the manufacturing method | |
| JPH0357251A (en) | Semiconductor device | |
| JPH0223640A (en) | Resin sealed type semiconductor device | |
| JPS6180842A (en) | Semiconductor device | |
| JP3173328B2 (en) | Lead frame for semiconductor device | |
| JPH0685133A (en) | Semiconductor integrated circuit device | |
| US6621151B1 (en) | Lead frame for an integrated circuit chip | |
| JPS5917979B2 (en) | semiconductor equipment | |
| JPS6242536Y2 (en) | ||
| JPH03105957A (en) | Semiconductor integrated circuit device | |
| JPH0870087A (en) | Lead frame | |
| JP2963952B2 (en) | Semiconductor device | |
| JPH05343578A (en) | Semiconductor device and manufacturing method thereof | |
| JPS60110145A (en) | Resin-sealed type semiconductor device | |
| JPH05175267A (en) | Semiconductor device | |
| JPS63104458A (en) | Semiconductor device | |
| JPH0311754A (en) | Semiconductor device | |
| JPS63269539A (en) | Bonding wire for semiconductor integrated circuit | |
| JPH04206956A (en) | Resin-sealed semiconductor device | |
| JPH07231065A (en) | Resin-sealed semiconductor device | |
| KR19980020728A (en) | Lead frame for semiconductor chip package with heat dissipation lead |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |