JPH07193213A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To provide a method for manufacturing a gate turn-off thyristor of the fine structure without generating the coming-off of an insulating film. CONSTITUTION:After forming an N-type emitter layer 4 and P-type gate diffusion layers 9a, 9b in a P-type base layer 3, a cathode electrode 6 and first and second metal gate thin films 10a, 10b are formed at specified places. Nextly, a high molecular insulating film 8 is formed and then a metal film 12 is formed on the whole surface. Then, etching is conducted so that the edge of an insulating film 8 may be protected from an etchant by part of a metal film 12. By this method, the coming-off of the insulating film that might be caused by etching is prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, it can be used in the field of manufacturing a gate turn-off thyristor which is a self-turn-off switching element.

[0002]

2. Description of the Related Art Conventionally, for example, a gate turn-off thyristor (hereinafter abbreviated as GTO) is known as a semiconductor device of this type. This GTO is increasingly exerting its characteristics as a self-extinguishing element for electric power in the field of large current control, and at present, an element capable of turning off an anode current of 4500A has been developed. Particularly in recent years, a so-called alloy-free structure, in which a thermal buffer plate such as tungsten is not brazed as an electrode in the anode region of the Si semiconductor portion, has been attracting attention from the viewpoint of performance and cost. One of the features of the alloy-free GTO is that it is advantageous for miniaturization. This is an IC because the heat buffer plate is not brazed
This is due to the availability of high-precision miniaturization equipment used in wafer processing of LSIs and LSIs. However, G
In TO, it is necessary to etch the semiconductor surface in order to form the gate electrode, and the inactive region generated by this etching has prevented miniaturization. Therefore, a gate structure suitable for an alloy-free GTO that can be miniaturized is described in JP-A-4-44363 and JP-A-3-8803. 4 and 5 are sectional views of a GTO having this gate structure. In the structure of FIG. 4, an insulating film 8 made of polyimide or the like is provided on the gate electrode 10 so that the cathode electrode 6 and the gate electrode 10 are not short-circuited on the P-type gate diffusion layer 9. The sum of the thicknesses does not exceed the thickness of the cathode electrode 6,
The gate structure does not use conventional etching.

Further, the one shown in FIG.
In a gate turn-off thyristor with a gate structure, P
Type gate turn-off thyristor diffusion layer 9a has a first metal gate electrode 10 thinner than the cathode electrode 6 on the surface thereof.
In addition to a and the second metal gate electrode 10b, the SiO ₂ film 11 which is an insulating thin film is provided in a precise pattern.

The method of manufacturing the gate turn-off thyristor of FIG. 4 is manufactured as described below.

First, a low-impurity-concentration Si wafer to be the N-type base layer 2 is used.
Type impurities (eg, aluminum, Ga, B) are diffused,
A P-type base layer 3 and a P-type emitter layer 1 are formed. next,
P-type impurities (for example, B) are selectively diffused from the surface of the P-type base layer 3 to a very high concentration to selectively diffuse the P-type gate diffusion layer 9a,
9b is formed. Furthermore, from the surface of the P-type base layer 3 to N
A type impurity (for example, P, Sb) is selectively diffused at a high concentration to form an N type emitter layer 4. Next, a silicon oxide film (SiO ₂ ) is formed on the surface of the Si wafer, and the SiO ₂ film 11 is formed into a precise pattern using a photolithography technique.
Leave.

Next, an electrode 5 having a thickness of about 15 μm is formed on the anode surface by aluminum vapor deposition (or aluminum sputtering). Further, aluminum is vapor-deposited to a thickness of about 9 μm on the cathode surface, and a thin cathode electrode 6 is formed by a photolithography technique. Furthermore, aluminum is vapor-deposited to a thickness of about 2 μm on the cathode surface, and the first metal gate electrode 10a is formed by the photolithography technique.
And a second metal gate electrode 10b is formed. At this time, at the same time, aluminum vapor deposition is also applied on the cathode electrode 6, and the total thickness becomes about 11 μm. Next, the surfaces of the cathode electrode 6 and the gate electrode 7 on the cathode side except the lead-out portion to the external terminal are covered with the insulator 8. As a result, the cathode electrode can be pressure-contacted with the groove-less thermal buffer plate, and the characteristics equal to or higher than those of the conventional hybrid gate structure GTO can be obtained.

The metal gate formed on the surface of the diffusion gate is composed of the P-type diffusion gate layer 9a and the first metal gate layer 10.
a, by controlling the area of contact with the second metal gate 10b with an insulating film (for example, the SiO ₂ film 11), it is possible to take advantage of the uniform carrier extraction capability of the diffusion gate and the low resistance capability of the metal gate at the same time. . In FIG. 5, the cathode electrode is further used as a common electrode.

[0008]

The GTO has a great feature that it can also perform a turn-off as compared with a thyristor which can simply turn on a large current. A snubber circuit is required to suppress the sudden rise between the anode and the cathode at the time of turn-off. Reducing the capacitor capacity of the snubber circuit reduces the loss in the snubber circuit and reduces the size of the device.
This is an important issue that must be solved for the purpose of promoting weight reduction.

The GTO is composed of hundreds to thousands of slit-shaped cathode regions, and so-called unit GTOs operate in parallel to turn off a large current. It is well known that the snubber capacitor capacity can be reduced as the slit width of the unit GTO is narrowed to make it finer. Therefore, as shown in FIG.
And the structure as shown in FIG. 5 is advantageous. In particular, the structure shown in FIG. 5 can be miniaturized as compared with FIG. This is because there is no need for microfabrication processing after forming the cathode electrode metal film on the device surface. Since the metal film for the cathode electrode is the thickest film formed on the surface of the device, the microfabrication process of this film and the microfabrication process performed by further forming a thin film on the film step generated by this microfabrication process The accuracy at is significantly impaired. Therefore, in the structure of FIG. 4, the processing after forming the metal film for the cathode electrode, which impairs the processing accuracy, limits the fine processing, but in the structure of FIG. .

As described above, although the structure of FIG. 5 is advantageous for fine processing, there is a big problem that the edge of the insulating film 8 is easily peeled off when manufacturing an element in practice. FIG. 6 is an enlarged view of the end of the structure shown in FIG. In the structure of FIG. 4, the formation of the insulating film 8 and the subsequent processing step are the last, but in the structure of FIG. 5, the formation of the metal film 12 and the subsequent processing step are further added. FIG. 6 (A)
As shown in FIG. 3, when the metal film 12 is processed by etching, the exposed portion of the insulating film 8 is an acid solution (for example, hydrofluoric acid solution).
There is a problem that the film is easily peeled off as shown in FIG. A polymer material such as polyimide is used for the insulating film 8, and an inorganic material such as silicon oxide or silicon nitride is used for the insulating thin film. Problems like this
In addition to simply causing insulation failure in the peeled portion, the peeled insulating film may adhere to the electrode surface and cause conduction failure.

The problem to be solved by the present invention is what kind of means should be taken to prevent the peeling of the insulating film and manufacture a semiconductor device having a fine structure.

[0012]

The invention according to claim 1 of the present application is a semiconductor device in which an insulating film made of a polymer material is patterned on a semiconductor substrate, and a metal film is patterned on the insulating film. In the manufacturing method, the solution means is that the edge portion of the metal film is covered with a protective film when the metal film is patterned.

The invention according to claim 2 of this application is
A P-type emitter layer is formed on the back surface side of the semiconductor substrate, an N-type base layer is formed on the intermediate layer of the substrate to be joined to the P-type emitter layer, and the N-type base layer is formed on the front surface side layer of the substrate. A step of forming a P-type base layer to be bonded to the P-type base layer, a step of intermittently forming a plurality of N-type emitter regions in the surface layer of the P-type base layer along the surface direction, and an anode electrode on the back surface of the semiconductor substrate. , A step of providing a cathode electrode on each surface of the N-type emitter region, and a step of providing a relatively high concentration P-type gate region on the surface layer of the P-type base layer so as to surround the emitter region. A step of providing a gate electrode on the surface of the gate region, a step of forming an insulating film made of a polymer material on the surface of a portion of the gate electrode that is not directly connected to an external electrode, and each of the N-type emitter regions. The surface of the The method of manufacturing a semiconductor device and forming a common cathode electrode on the membrane, which turned on or off a current between the anode and cathode electrodes by applying a gate signal to the gate electrode,
The solution is to cover the edge of the insulating film with a protective film when forming the common cathode electrode.

According to a third aspect of the present invention, in the above-mentioned second aspect, the protective film is made of the same material as the common cathode electrode, and is provided on a portion of the gate electrode that is directly connected to the external electrode. The feature is that they are formed in layers.

The invention according to claim 4 is characterized in that, in the invention according to claim 2, the protective film is formed by extending a cathode electrode.

According to a fifth aspect of the present invention, in the second, third or fourth aspect of the invention, the gate electrode and the cathode electrode are formed intricately on the surface of the semiconductor substrate. .

[0017]

According to the first aspect of the present invention, by covering the edge of the insulating film made of a polymer material with the protective film, it is possible to prevent peeling from occurring at the edge. In particular, when the metal film is patterned after the step of patterning the insulating film, the edge portion of the insulating film is not exposed to the etching solution for the metal film, and film peeling can be prevented.

According to the second aspect of the invention, since the edge portion of the insulating film is protected when the common cathode electrode is formed, the edge portion of the insulating film is peeled off by the processing of the cathode electrode. It has an effect of preventing the increase. Therefore, it is possible to manufacture a finer semiconductor device (gate turn-off thyristor) without insulation failure or conduction failure.

In the inventions of claims 3 and 4, since the material film of the cathode electrode can be used as the protective film,
The protective film can be formed simultaneously with the formation of the cathode electrode simply by changing the mask for patterning the cathode electrode.

According to the fifth aspect of the present invention, peeling of the insulating film can be prevented, and the gate electrode and the cathode electrode can be collectively formed.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The details of the method for manufacturing a semiconductor device according to the present invention will be described below with reference to the embodiments shown in FIGS.

(Embodiment 1) FIGS. 1A to 1D and FIG. 2 show an embodiment in which the present invention is applied to a method for manufacturing a gate turn-off thyristor. Note that FIG.
FIG. 2D is a cross-sectional view of an essential part showing the step of this embodiment, and FIG. 2 is a cross-sectional explanatory view of the manufactured semiconductor device.

First, a silicon substrate 2 as a semiconductor substrate
1, a P-type emitter layer 1, an N-type base layer 2, a P-type base layer 3 and an N-type emitter region 4 as shown in FIG. 2 are formed by a method similar to the conventional method. Next, a plurality of N-type emitter regions 4 are intermittently formed on the surface of the P-type base layer 3, and P-type gate diffusion layers 9a and 9b are formed as shown in FIG.
Arrange. Next, as shown in FIG. 1, a resist 22 is patterned on the insulating thin film 11 made of, for example, SiO _{2 on the} surface of the substrate. The resist 22 is used as a mask to form an opening in the insulating thin film 11. Furthermore, FIG.
As shown in (B), aluminum is deposited by a sputtering method while leaving the resist 22 and the insulating thin film 11 is formed.
A cathode electrode 6 on the N-type emitter region 4 in the opening of
A first metal gate thin film (connected to an external electrode) 10a and a second metal gate thin film 10b are formed on the P-type gate diffusion layers 9a and 9b, respectively. Then, the lift-off method is performed to remove the resist 22 and the aluminum film thereon. Although the electrodes are formed by using the lift method in this embodiment, various other forming methods may be used.

Next, as shown in FIG. 1C, the second metal gate thin film 10b of the metal gate thin film which is not connected to the external electrode and the insulating thin film 11 beside the cathode electrode 6 are covered. The insulating film 8 made of a polymer material such as polyimide is patterned.

Next, in order to form a common cathode electrode of the cathode electrodes 6 exposed in the state shown in FIG. 1C, as shown in FIG.
The film 12 is formed on the entire surface, and the metal film 12 is formed into a predetermined pattern by using the photolithography technique and the wet etching technique. At this time, the first metal gate thin film 1
0a and an edge portion 8a of the insulating film 8 formed between the cathode electrode 6 adjacent thereto, the metal film 12 is a protective film 12
A wet etching mask is designed so as to remain as a. Further, the metal film 12 connecting the cathode electrodes 6 and the protective film 12a made of the same material are separated by wet etching so as not to be electrically connected. The protective film 12a is the first metal gate thin film 10a.
Become part of. A well-known acid solution is used as the wet etching solution.

According to this embodiment, since the protective film 12a can be formed simultaneously with the formation of the metal film 12, the peeling of the insulating film 8 can be prevented without increasing the number of steps. For this reason,
Fine structure G that can significantly reduce snubber capacitor capacity
TO can be formed. In the present embodiment, the P-type gate diffusion layers 9a and 9b having a relatively high concentration are formed on the surface layer of the P-type base layer 3 so as to surround the N-type emitter region 4.
Therefore, when the reverse voltage is applied between the gate and the cathode, the edge of the depletion layer generated in the vicinity of the N-type emitter region 4 reaches the adjacent N-type emitter region until it reaches the gate electrode window opening of the insulating film. Can be brought close to and miniaturized. Although not shown, in this embodiment, the gate electrode and the cathode electrode are intricately formed on the surface of the substrate, and the configuration is more intensive.

(Embodiment 2) FIGS. 3A and 3B are cross-sectional views of the essential portions of Embodiment 2 in which the present invention is applied to a method for manufacturing a gate turn-off thyristor.

In this embodiment, the method for forming the first and second metal gate thin films 10a and 10b and the cathode electrode 6 is the same as in the first embodiment. Then the second
The insulating film 8b covering the metal gate thin film 10b and the insulating film 8a formed on the insulating thin film 11 between the first metal gate thin film 10a and the cathode electrode 6 are made of a polymer material. Then, the insulating film 8a is formed narrowly on the cathode electrode 6 side.

Subsequently, as shown in FIG. 3A, after forming a metal film 12 on the entire surface, as shown in FIG. 3B, the cathode electrodes 6 are connected to each other and the entire insulating film 8a is formed. The metal film 12 is etched so as to cover it.

Also in this embodiment, since the edge portion of the insulating film 8a is not exposed to the etching solution, film peeling does not occur.

Although the embodiments in which the present invention is applied to the gate turn-off thyristor have been described above, the present invention is not limited to these, and the metal film is wet-etched after the insulating film made of a polymer material is patterned. Of course, it can be applied to other semiconductor devices to be processed.

[0032]

As is apparent from the above description, according to the present invention, it is possible to reliably manufacture a semiconductor device without causing peeling of the insulating film. Further, it has an effect of preventing the peeling of the insulating film during processing, which is the biggest obstacle in manufacturing the gate turn-off thyristor having a fine structure. Moreover, since a part of the metal film can be used as the protective film, it is possible to surely manufacture without increasing the number of steps.

[Brief description of drawings]

1A to 1D are cross-sectional views of a main part showing a process of a first embodiment of the present invention.

FIG. 2 is a sectional view of the GTO according to the first embodiment.

3A and 3B are cross-sectional views of the essential part showing the steps of Embodiment 2 of the present invention.

FIG. 4 is a sectional view of a conventional GTO.

FIG. 5 is a cross-sectional view of a conventional GTO.

6A and 6B are cross-sectional views of a main part showing a conventional manufacturing process.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... P-type emitter layer 2 ... N-type base layer 3 ... P-type base layer 4 ... N-type emitter region 5 ... Anode electrode 6 ... Cathode electrode 8 ... Insulating layer 9a, 9b ... P-type gate diffusion layer 10a ... First Metal gate thin film (connected to external electrode) 10b ... Second metal gate thin film 11 ... Insulating thin film 12 ... Metal film 12a provided to use the cathode electrode as a common electrode ... Protective film (AL) 21 ... Silicon substrate

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI technical display location H01L 29/74 J

Claims (5)

[Claims] 1. A method of manufacturing a semiconductor device, wherein an insulating film made of a polymer material is patterned on a semiconductor substrate, and a metal film is patterned on the insulating film, wherein the metal film is patterned when the metal film is patterned. A method for manufacturing a semiconductor device, characterized in that an edge portion is covered with a protective film. 2. A semiconductor substrate having a P-type emitter layer formed on a back surface side thereof, an intermediate layer of the substrate having an N-type base layer joined to the P-type emitter layer, and a front surface side layer of the substrate. Forming a P-type base layer to be joined to the N-type base layer; forming a plurality of N-type emitter regions on a surface layer of the P-type base layer intermittently along the surface direction; A step of providing an anode electrode on the back surface of the P type, a step of providing a cathode electrode on the surface of each of the N type emitter regions, and a P type of relatively high concentration so as to surround the emitter region on the surface layer of the P type base layer. A step of providing a gate region, a step of providing a gate electrode on the surface of the gate region, a step of forming an insulating film made of a polymer material on the surface of a portion of the gate electrode that is not directly connected to the external electrode, Table of each of the type emitter regions And a step of forming a common cathode electrode on the surface and the insulating film, wherein a gate signal is applied to the gate electrode to turn on or off a current between the anode and the cathode electrode. A method of manufacturing a semiconductor device, wherein an edge portion of the insulating film is covered with a protective film when the common cathode electrode is formed. 3. The method of manufacturing a semiconductor device according to claim 2, wherein the protective film is made of the same material as the common cathode electrode and is formed so as to overlap with a portion of the gate electrode that is directly connected to an external electrode. . 4. The method of manufacturing a semiconductor device according to claim 2, wherein the protective film is formed by extending a cathode electrode. 5. The method of manufacturing a semiconductor device according to claim 2, 3, or 4, wherein the gate electrode and the cathode electrode are formed intricately on the surface of the semiconductor substrate.