JPH0724333B2 - Manufacturing method of insulating substrate with thin metal layer - Google Patents

Manufacturing method of insulating substrate with thin metal layer

Info

Publication number
JPH0724333B2
JPH0724333B2 JP28263187A JP28263187A JPH0724333B2 JP H0724333 B2 JPH0724333 B2 JP H0724333B2 JP 28263187 A JP28263187 A JP 28263187A JP 28263187 A JP28263187 A JP 28263187A JP H0724333 B2 JPH0724333 B2 JP H0724333B2
Authority
JP
Japan
Prior art keywords
copper
metal layer
copper foil
insulating substrate
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP28263187A
Other languages
Japanese (ja)
Other versions
JPH01124292A (en
Inventor
良明 坪松
昭士 中祖
順雄 岩崎
一泰 皆川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP28263187A priority Critical patent/JPH0724333B2/en
Publication of JPH01124292A publication Critical patent/JPH01124292A/en
Publication of JPH0724333B2 publication Critical patent/JPH0724333B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Manufacturing Of Printed Wiring (AREA)

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は,印刷配線板の製造に使用される,金属薄層付
絶縁基板の製造法に関する。
Description: TECHNICAL FIELD The present invention relates to a method for manufacturing an insulating substrate with a thin metal layer, which is used for manufacturing a printed wiring board.

(従来の技術) 印刷配線板の製造に使用される,銅張り積層板として
は,ステンレス・スチールの回転ドラム上に電解析出さ
せた銅箔と紙やガラス基材に熱硬化性樹脂を含浸させた
プリプレグとを積層したものがあった。また,フレキシ
ブル配線板及び多層フレキシブル配線板用銅箔付きフィ
ルムとしては,例えば,ポリイミドフィルムと圧延銅箔
とを接着剤を介して熱圧着したものがあった。この場
合,銅層の厚さとしては18μm,35μm,50μm程度と厚い
ものが主流であった。
(Prior Art) Copper-clad laminates used in the production of printed wiring boards include copper foil electrolytically deposited on a stainless steel rotating drum and paper or glass base material impregnated with a thermosetting resin. There was a laminate of the prepared prepreg. Further, as a film with a copper foil for a flexible wiring board and a multilayer flexible wiring board, for example, there is one in which a polyimide film and a rolled copper foil are thermocompression bonded via an adhesive. In this case, as the thickness of the copper layer, the one having a large thickness of 18 μm, 35 μm, and 50 μm was the mainstream.

上記のような銅張りを積層板あるいは銅層付フィルムを
使った印刷配線板の製造法としては,銅張積層板等をエ
ッチングして回路加工を行うエッチドフォイル法や,レ
ジスト形成用表面処理をした後,レジスト形成→めっき
→めっきレジスト除去→クィックエッチングによる回路
加工を行うアンクラッド法等がある。
As a method of manufacturing a printed wiring board using a copper-clad laminate or a film with a copper layer as described above, there are an etched foil method of etching a copper-clad laminate and the like for circuit processing, and a surface treatment for resist formation. There is an unclad method that performs circuit processing by resist formation → plating → plating resist removal → quick etching.

エッチドフォイル法は,サイドエッチングの問題があり
高密度配線板の製造は困難である。アンクラッド法で
は,5〜9μmの銅箔を用いた銅張り積層板をベースにし
ている。この方法に於ける配線の微細・高密度化は下地
金属層の厚さに依存している。すなわち,エッチングす
る下地金属層の厚さが薄い程エッチング精度が高くな
る。そこで,高密度配線を形成する場合は5〜9μmと
薄い銅箔を用いた銅張り積層板をベースとしているが,
銅箔のキャリアーであるアルミ箔を積層後物理的あるい
は化学的に除去する必要があること,及びキャリアーを
除去後,例えばレジストなどに対して接着性が良い粗面
処理が必要であることなど欠点がある。
The etched foil method has a problem of side etching, and it is difficult to manufacture a high-density wiring board. The unclad method is based on a copper-clad laminate using copper foil of 5 to 9 μm. The fineness and high density of wiring in this method depends on the thickness of the underlying metal layer. That is, the thinner the underlying metal layer to be etched, the higher the etching accuracy. Therefore, when forming high-density wiring, the base is a copper-clad laminate using a thin copper foil of 5 to 9 μm.
Disadvantages, such as the need to physically or chemically remove the aluminum foil, which is the carrier of the copper foil, after lamination, and the need for rough surface treatment with good adhesion to, for example, resist after removing the carrier There is.

薄い下地金属層を形成する方法としては他に無電解めっ
き法,真空蒸着法,スパッタリング法などがある。無電
解めっき法は絶縁基板表面を物理的又は化学的な方法で
処理してその基板表面を親水化,粗面化をする工程を必
要とし,生成した金属層〜基板間の接着力も低い。な
お,耐熱性をあまり要求されないものについては,ゴム
系樹脂に無電解めっき用の触媒を混入させた接着剤層を
粗面化した後無電解めっきを行う方法もあるが,後工程
で形成された回路間及び接着剤層中に残存する金属触媒
のため,特性上の欠点がある。
Other methods for forming a thin base metal layer include electroless plating, vacuum deposition, and sputtering. The electroless plating method requires a step of treating the surface of the insulating substrate with a physical or chemical method to make the surface of the substrate hydrophilic and rough, and the adhesive force between the generated metal layer and the substrate is low. For those that do not require high heat resistance, there is also a method of roughening the adhesive layer in which a catalyst for electroless plating is mixed with a rubber-based resin and then performing electroless plating. The metal catalyst remains between the circuits and in the adhesive layer, resulting in a defect in characteristics.

真空蒸着法及びスパッタリング法において,例えば,ガ
ラス布−エポキシ積層板やガラス布−ポリイミド積層板
を用いる場合,ガラス布に吸着している水分及び樹脂層
を残存している溶剤分のために,蒸着やスパッタなどで
必要となる高真空下では水分,溶剤がガス化し,ガラス
布〜樹脂界面での剥離やボイドが生じてしまう。更にス
ループットが低いという欠点ある。
In the vacuum vapor deposition method and the sputtering method, for example, when a glass cloth-epoxy laminate or a glass cloth-polyimide laminate is used, vapor deposition due to the water content adsorbed on the glass cloth and the residual solvent component. Moisture and solvent are gasified under the high vacuum required for sputtering and spattering, causing peeling and voids at the glass cloth-resin interface. Further, it has a drawback of low throughput.

本発明は,高密度配線を可能とする金属薄層付絶縁基板
の製造法を提供するものである。
The present invention provides a method for manufacturing an insulating substrate with a thin metal layer that enables high-density wiring.

(問題点を解決するための手段) 本発明の方法は,まず銅箔表面に酸化銅を形成後,酸化
銅層に面して絶縁性有機材料を積層し,銅箔部分をエッ
チング除去する。次に絶縁性有機材料表面に残存してい
る酸化銅層に還元処理を施し,金属銅および/または亜
酸化銅とするものである。なお,次いで無電解銅めっ
き,あるいは無電解銅めっきと電気銅めっきの併用によ
って金属層を所望の厚さまでめっき成形しても良い。
(Means for Solving the Problems) In the method of the present invention, first, after forming copper oxide on the copper foil surface, an insulating organic material is laminated facing the copper oxide layer, and the copper foil portion is removed by etching. Next, the copper oxide layer remaining on the surface of the insulating organic material is subjected to reduction treatment to obtain metallic copper and / or cuprous oxide. The metal layer may be plated to a desired thickness by electroless copper plating or a combination of electroless copper plating and electrolytic copper plating.

第1図(a)〜(d)は本発明の実施例を示すものであ
る。
1 (a) to 1 (d) show an embodiment of the present invention.

銅張り積層板用35μm銅箔1の表面に酸化銅2を形成す
る(第1図(a),(b))。酸化銅処理条件は例え
ば,次の通りである。
Copper oxide 2 is formed on the surface of a 35 μm copper foil 1 for copper-clad laminate (FIGS. 1 (a) and (b)). The copper oxide treatment conditions are, for example, as follows.

NaOH =15g/ NaPO4・12H2O=30g/ NaClO2 =80g/ 純 水 =1になる量 液 温 =85±2℃ この他,銅箔表面に酸化銅を形成する方法としては,亜
塩素酸ナトリウム,次亜塩素酸ナトリウム,過硫酸カリ
ウム,塩素酸カリウム,過塩素酸カリウムなどの酸化剤
を含む処理液で処理する方法がある。酸化銅処理の前処
理として銅箔は例えばシップレー社製の脱脂液であるニ
ュートラルクリーンに5分間浸漬し,流水洗いて,更に
10%硫酸水に2分浸漬し,流水洗後80℃で30分間乾燥す
る。
NaOH = 15g / NaPO 4 · 12H 2 O = 30g / NaClO 2 = 80g / become pure water = 1 amounts solution temperature = 85 ± 2 ° C. In addition, as a method of forming a copper oxide surface of the copper foil, the chlorite There is a method of treating with a treatment liquid containing an oxidizing agent such as sodium acid salt, sodium hypochlorite, potassium persulfate, potassium chlorate, and potassium perchlorate. As a pretreatment for the copper oxide treatment, the copper foil is immersed in neutral clean which is a degreasing liquid manufactured by Shipley Co., Ltd. for 5 minutes, washed with running water, and further
Immerse in 10% sulfuric acid for 2 minutes, wash with running water, and dry at 80 ° C for 30 minutes.

この場合使用する銅箔としては,他の金属箔,金属板や
有機質フィルムなどの支持体の上に銅層が形成されたも
のでも良い。銅のみから成る箔を用いる場合は,厚さに
技術上の制限はないが,取り扱い上及び価格の点から10
〜70μmが好ましい。
In this case, the copper foil used may be another metal foil, a metal plate, an organic film or the like having a copper layer formed on a support. When using a foil made of only copper, there is no technical limit to the thickness, but in terms of handling and price, 10
˜70 μm is preferred.

また,樹脂基材〜金属層間の接着力を高めるためには,
銅箔表面が予め粗面化されたものが良好である。その粗
面化の方法としては研磨,ホーニング,エッチング,電
気めっき,無電解めっきなどがある。
Moreover, in order to enhance the adhesive force between the resin base material and the metal layer,
It is preferable that the copper foil surface is roughened in advance. The roughening methods include polishing, honing, etching, electroplating and electroless plating.

次に,絶縁製有機ガラス布−エポキシプリプレグ3と加
圧積層する(第1図(c))。積層条件は成形圧力35kg
/cm2,170℃で60分間である。酸化銅2を形成した後積層
する絶縁性有機材料としては他に,変性ポリイミド,ポ
リイミド,フェノールなど一般の銅張り積層板に用いら
れる熱硬化性樹脂を含浸させたガラス布,樹脂シート等
を用いることができる。
Next, it is pressure-laminated with an insulating organic glass cloth-epoxy prepreg 3 (FIG. 1 (c)). Laminating condition is molding pressure 35kg
/ cm 2 , 170 ℃ for 60 minutes. As the insulating organic material to be laminated after forming the copper oxide 2, glass cloth impregnated with thermosetting resin such as modified polyimide, polyimide, or phenol, which is used for general copper-clad laminate, resin sheet, etc. are used. be able to.

又,ポリエチレン,テフロン,ポリエーテルサルフォ
ン,ポリエーテルイミドなどの熱可塑性材料も用いられ
る。
Further, thermoplastic materials such as polyethylene, Teflon, polyether sulfone and polyether imide are also used.

次に,多過アンモニウム塩系エッチング液を用いて,銅
箔1をエッチング除去する。この場合,酸化銅2はエッ
チングされずに有機基材3表面に残存する。
Next, the copper foil 1 is removed by etching using a polyammonium salt-based etching solution. In this case, the copper oxide 2 remains on the surface of the organic base material 3 without being etched.

水洗後,還元剤水溶液(水素化ホウ素ナトリウム2g/,
NaOH12.5g/,液温55℃)に10分間浸漬して該酸化銅層
2を還元し,亜酸化銅あるいは金属銅4とする。この場
合,還元水溶液としてホルマリン,次亜リン酸,次亜リ
ン酸ナトリウム,抱水ヒドラジン,塩酸ヒドラジン,硫
酸ヒドラジン,N,N′−トリメチルボラザン,N,N′−ジメ
チルボラゼンなどの一種又は二種以上を溶解させたもの
でも良い。
After washing with water, reducing agent aqueous solution (sodium borohydride 2 g /,
The copper oxide layer 2 is reduced by immersing it in NaOH 12.5 g /, liquid temperature 55 ° C.) for 10 minutes to form cuprous oxide or metallic copper 4. In this case, as a reducing aqueous solution, one of formalin, hypophosphorous acid, sodium hypophosphite, hydrazine hydrate, hydrazine hydrochloride, hydrazine sulfate, N, N'-trimethylborazane, N, N'-dimethylborazene or the like, or It may be a mixture of two or more kinds.

なお,上記工程に加えて,下記組成及び条件の無電解銅
めっき,あるいは無電解銅と電気銅めっきの併用によっ
て金属層を所望の厚さまでめっきしても良い。
In addition to the above steps, the metal layer may be plated to a desired thickness by electroless copper plating with the following composition and conditions, or a combination of electroless copper and electrolytic copper plating.

CuSO4・5H2O =10g/ EDTA・4Na =40g/ pH =12.3 37%HCHO =3/ めっき液添加量=少量 めっき液温度 =70℃ めっき膜厚 =3μm 以上のような本発明の銅箔り積層板は,配線板用内層回
路板としての用途のみならず,多層配線板の最外層とし
ての使用も可能である。
CuSO 4・ 5H 2 O = 10g / EDTA ・ 4Na = 40g / pH = 12.3 37% HCHO = 3 / plating solution addition amount = small amount plating solution temperature = 70 ℃ plating film thickness = 3μm The re-laminated board can be used not only as an inner layer circuit board for wiring boards, but also as the outermost layer of a multilayer wiring board.

本発明においては,銅箔に形成される酸化銅は大きさが
サブミクロン以下の繊維状〜柱状あるいは粒状結晶であ
る。そのために,酸化銅処理した銅箔と樹脂等の有機絶
縁材料を積層して銅箔を除去した樹脂基板表面には,高
い接着力をもった酸化銅が残存する。
In the present invention, the copper oxide formed on the copper foil is a fibrous to columnar or granular crystal having a size of submicron or less. Therefore, copper oxide having high adhesiveness remains on the surface of the resin substrate from which the copper foil treated with copper oxide and the organic insulating material such as resin are laminated and the copper foil is removed.

また,還元処理により樹脂基板に生成する銅および/ま
たは亜酸化銅層の厚さ及び形状は,酸化銅形成工程ある
いは還元処理工程での条件を適宜変更することにより調
整できる。
Further, the thickness and shape of the copper and / or cuprous oxide layer formed on the resin substrate by the reduction treatment can be adjusted by appropriately changing the conditions in the copper oxide forming step or the reduction treatment step.

(発明の効果) 本発明に於ては,金属層の厚さが0.1〜5μmと薄いた
め,アンクラッド法による配線板製造工程におけるエッ
チングによるライン巾精度が著しく向上し,高解像のポ
ジ型液状レジストを適用すればライン/スペースが30/3
0μm程度の高密度配線を可能にする。
(Effect of the invention) In the present invention, since the thickness of the metal layer is as thin as 0.1 to 5 µm, the line width accuracy by etching in the wiring board manufacturing process by the unclad method is remarkably improved, and the high resolution positive Line / space is 30/3 if liquid resist is applied
Enables high-density wiring of about 0 μm.

また,絶縁基板と金属層の接着力も高く,信頼性も向上
する。なお,還元生成した銅あるいは亜酸化銅表面及び
樹脂基板表面には微細な凸凹があるため,レジストパタ
ーン形成用あるいは多層化接着用の粗化処理が不要であ
ること,更に無電解めっき用の触媒処理工程も不要であ
るため,スループットが著しく向上した。
Also, the adhesion between the insulating substrate and the metal layer is high, and the reliability is improved. Since the reduced copper or cuprous oxide surface and the resin substrate surface have fine irregularities, no roughening treatment is required for resist pattern formation or multilayer adhesion, and a catalyst for electroless plating is also required. Since no processing steps are required, the throughput is significantly improved.

【図面の簡単な説明】[Brief description of drawings]

第1図(a)〜(d)は本発明の方法を示す断面図であ
る。 符号の説明 1……銅箔 2……酸化銅 3……プリプレグ(絶縁基材) 4……銅及び/又は亜酸化銅
1 (a) to 1 (d) are cross-sectional views showing the method of the present invention. Explanation of code 1 …… Copper foil 2 …… Copper oxide 3 …… Prepreg (insulating base material) 4 …… Copper and / or cuprous oxide

───────────────────────────────────────────────────── フロントページの続き (72)発明者 皆川 一泰 茨城県下館市大字小川1500番地 日立化成 工業株式会社下館研究所内 (56)参考文献 特開 昭61−279531(JP,A) 特公 昭56−5079(JP,B2) ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kazuyasu Minagawa 1500 Ogawa, Shimodate, Ibaraki Shimodate Research Laboratory, Hitachi Chemical Co., Ltd. (56) Reference JP-A-61-279531 (JP, A) JP 56-5079 (JP, B2)

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】銅箔を酸化剤を有する処理液に接触させ
て,その銅箔面に酸化銅を形成した後,酸化銅面に絶縁
性有機材料を積層し,エッチング液を接触させることに
よって銅箔を除去し,次に還元剤溶液を接触させること
を特徴とする金属薄層付絶縁基板の製造法。
1. A copper foil is brought into contact with a treatment liquid containing an oxidizing agent to form copper oxide on the copper foil surface, an insulating organic material is laminated on the copper oxide surface, and an etching liquid is brought into contact therewith. A method for producing an insulating substrate with a thin metal layer, which comprises removing a copper foil and then bringing it into contact with a reducing agent solution.
JP28263187A 1987-11-09 1987-11-09 Manufacturing method of insulating substrate with thin metal layer Expired - Lifetime JPH0724333B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28263187A JPH0724333B2 (en) 1987-11-09 1987-11-09 Manufacturing method of insulating substrate with thin metal layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28263187A JPH0724333B2 (en) 1987-11-09 1987-11-09 Manufacturing method of insulating substrate with thin metal layer

Publications (2)

Publication Number Publication Date
JPH01124292A JPH01124292A (en) 1989-05-17
JPH0724333B2 true JPH0724333B2 (en) 1995-03-15

Family

ID=17655032

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28263187A Expired - Lifetime JPH0724333B2 (en) 1987-11-09 1987-11-09 Manufacturing method of insulating substrate with thin metal layer

Country Status (1)

Country Link
JP (1) JPH0724333B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5109400B2 (en) * 2006-09-08 2012-12-26 日立化成工業株式会社 Copper surface treatment liquid set, copper surface treatment method using the same, copper, wiring board, and semiconductor package
JP6275200B2 (en) * 2016-06-16 2018-02-07 日本化薬株式会社 Double-sided circuit board suitable for high-frequency circuits

Also Published As

Publication number Publication date
JPH01124292A (en) 1989-05-17

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