JPH0767149B2 - Character / pattern memory playback device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a character / pattern storage / reproduction device capable of storing an image pattern such as a title character or a graphic, and outputting the image pattern superimposed on another image. Is.

[Conventional technology]

In recent years, the demand for home video cameras has increased with the spread of home VTRs, and the demand for multifunctional and editing functions of home video cameras has increased.

Among these functions, the impose for inserting a title or the like, the telop, etc. are one of the most requested functions.

Hereinafter, a conventional telop device for inserting a title or the like will be described with reference to FIGS. 4 to 6. In FIG. 4, (1) is a video signal input terminal, (2) is a detection circuit for extracting character / pattern information, (3) is a sync separation circuit for separating a sync signal from the video signal input, and (4) is a serial line. Parallel conversion circuit, (5) parallel-serial conversion circuit, (6) memory, (7) reference clock oscillation circuit, (8) and (9) vertical counters for instructing addresses of the memory (6), horizontal A counter, (12) a command signal of a user such as a switch, (13) a character superimposing circuit for superimposing character / pattern information on another video signal,
(14) is a video output terminal, (15) is an offset addressing circuit for adding and reading the offset address from the time of writing, and (10) is a switch circuit for preventing data other than the stored range from being read. (16) is a read masking signal for controlling it, (11) is a command signal (12) and the sync signal from the sync separation circuit (3) is input, and the vertical counter (8), horizontal counter (9),
It is a controller for controlling the count and reset timing of the offset address counter (15) and the reading and writing of the memory (6), and these together constitute a character / pattern storage / reproduction device (17).

FIG. 5 shows an example of using the character / pattern storage / reproduction device in a video camera. (18) is a subject, (19) is a title image to be inserted, (20) is a lens, (21) is an image sensor,
(22) is a signal processing circuit, and (23) is a monitor television. In FIG. 5, the title image (19) to be inserted in advance is photographed, passed through the lens (20), and the image sensor (21) is inserted.
The video signal is taken out by, the video signal is synthesized from the video signal by the signal processing circuit (22), and is input to the character / pattern storage / reproduction device.

The input video signal is binarized by the detection circuit (2) into a digital signal at the same time as the sync signal is created by the sync separation circuit (3), and this digital signal is converted by the serial-parallel conversion circuit (4). Although it becomes a digital signal of 8 bits or the like and is stored in the memory (6), the controller (11) resets the horizontal counter (9) at the start point of one horizontal scan and the vertical counter (8) at the start point of one vertical scan. I shall. Further, the horizontal counter (9) counts the reference clock from the transmitting circuit (7) and the vertical counter (8) counts horizontal scanning.

When the title image (19) is stored, the subject (18) is photographed and the video signal is input to the character / pattern storage / playback device (17).

When the video signal of the subject is input, the controller (11) uses the sync signal generated by the sync separation circuit (3) as a reference and the horizontal counter (9) at the starting point of one horizontal scan, as in the case of storing. The vertical counter (8) is reset at the start point of one vertical scan, and the positions of patterns, characters, etc. on the screen and the title image (1
9) Correlate with

It is assumed that the memory map is configured to store and reproduce two 512-bit horizontal and 256-bit vertical screens in a memory generally called 256 kbit. At this time, the title image is recorded, superimposed on the image showing the subject, and the horizontal counter (9) when the title image is scrolled horizontally, the offset address, the image on the monitor TV (23), the read masking signal (16 ) Is shown in FIG.

An offset address designating circuit (15) designates an offset address in synchronization with vertical scanning (V sync signal). The horizontal counter (9) presets this value at the start point of horizontal scanning (H synchronization signal) and then counts the reference clock, and this value becomes the memory read address. When the memory read address is less than 0 or 512 or more, the read masking signal (16) is output.

In the state of FIG. 6A, the offset address is 0, 0 is preset in the horizontal counter (9) at the start point of the H synchronization signal, and the reference clock (7) is counted from 0 and becomes the memory read address. Therefore, the read masking signal (16) is not output, and the telop is displayed in a state where the image on the monitor television (23) is not scrolled (reference position). The offset address is 25 in FIG.
When it is 6, 256 is preset at the start point of the H sync signal.
The reference clock (7) is counted from 256 and the memory (6) is read. And the read address is
At 512 or more, the masking signal (16) is read out. The image on the monitor TV (23) at this time is in a state of scrolling to the left by half.

[Problems to be Solved by the Invention]

The conventional character / pattern storage / reproduction device has been described above. However, even if the conventional character / pattern storage / reproduction device has a memory capacity for a plurality of sheets, the portion corresponding to the read masking signal is a character / pattern. Since the information is not read, the character / pattern information can only be scrolled one by one independently.

It is an object of the present invention to provide a character / pattern storage / reproduction device capable of continuously scrolling character / pattern information for a plurality of images, such as those used in movies and television broadcasting, in a home video camera. Especially.

[Means for Solving the Problems]

A page maximum address detection circuit that detects the end point of one screen according to an actual read address, a page command signal that is a command signal from the user, and a read page switching circuit that includes a continuous scroll command signal are added. Also,
According to the command address of the offset addressing circuit,
Switch between page command signal and continuous scroll signal.

[Action]

When reading from the memory, by switching the read page every time the maximum page address is detected, the character / pattern information of two pages can be read simultaneously. At this time, by scrolling the command address of the offset address designating circuit at a constant interval in synchronization with the video signal, it is possible to continuously scroll the character / pattern information.

[Embodiment of the Invention] Hereinafter, as an embodiment of the present invention, a memory map is generally 25
Memory called 6 Kbits is 512 bits horizontal and 2 vertical
A case in which two 56-bit screens are configured to be stored and reproduced, and these two screens are referred to as A and B, and A and B two screens are continuously scrolled will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a character / pattern storage / reproduction device according to the present invention. In FIG.
(1) is a video signal input terminal, (2) is a detection circuit for extracting character / pattern information, (3) is a sync separation circuit for separating a sync signal from the video signal input, (4) is a serial-parallel conversion circuit, ( 5) is a parallel-serial conversion circuit,
(6) is a memory, (7) is a reference clock oscillation circuit,
(8) and (9) are vertical counters and horizontal counters that respectively instruct the address of the memory (6), (12) is a command signal of a user such as a switch, and (13) is superimposition of character / pattern information on another video signal. Character superposition circuit for, (14)
Is a video output terminal, (15) is an offset addressing circuit for adding and reading an offset address from the time of writing, and (10) is a switch circuit for preventing data other than the stored range from being read (16) Is a read masking signal controlling it, (29) is a read page switching circuit, (11) is a command signal (12) and a sync signal from the sync separation circuit (3) is input, and a vertical counter (8), It is a controller for controlling the count and reset timing of the horizontal counter (9) and the offset address counter (15) and the reading and writing of the memory (6).
The entire character / pattern storage / reproduction device (17) is configured.

Fig. 2 shows an example of the read page switching circuit (29) of the character / pattern storage / reproduction device. (24) is the page maximum address detection circuit, and the memory read address is the maximum address of one page (the horizontal address in this case is 511). Suppose it goes to "H" when it exceeds. (25) is a page command signal controlled by the controller (11), "H" for page A,
“L” means page B. (26) is also a continuous scroll command signal controlled by the controller (11), and "H" means continuous scroll, and "L" means one screen scroll. (27) is exclusive OR, (28)
Is a serector, which together constitute a read page switching circuit (29). When the continuous scroll command signal (26) is "L", the page command signal (25) is directly read and becomes the page switching signal. When the continuous scroll command signal (26) is "H", when the page maximum address detection is "L", the page command signal (25) is read as a page switching signal, and when the page maximum address detection is "H", the page The inversion of the command signal (25) becomes the read page switching signal.Figure 3 shows the horizontal counter (9), the offset address page command signal (25) and the continuous scroll when the two screens are continuously scrolled horizontally. An example of the relationship between the switching timing of the command signal (26) and the image on the monitor TV is shown.

The operation of storing the title to be inserted in advance in the memory and the operation of correlating and superimposing the positions of the patterns and characters stored with the background video signal as the input and the title stored in the memory are the same as the conventional ones.

A case where the memory screen is continuously scrolled horizontally in the order of A and B will be described with reference to FIG. First, at the start point of continuous scrolling, the page command signal (25) is set to "H" and the continuous scroll command signal (26) is set to "H".

When the continuous scroll designation signal (26) is "H", the selector (28) selects the exclusive OR (27) of the page maximum address detection circuit (24) and the page command signal (25).

At the same time, the offset address designation circuit (15) counts up the offset address from -512 in synchronization with the V sync signal, and the controller (11) has the designated value of the offset address designation circuit (15) as 512. At the same time, the page command signal (25) is switched, and at the same time, the continuous scroll command signal (26) is set to "L".

After that, when the offset address designation value 1023 is counted up, the continuous scroll operation is ended.

For the memory read address, the offset address value is preset at the start point of the H synchronization signal and the reference clock is counted up. Therefore, in the same V period, the preset value and the final count value are the same.

At this time, screen A is displayed from 0 to 511 of the memory read address.
However, the screen B corresponds to 512 to 1023.

The page maximum address detection circuit (24) outputs "H" when the memory read address is 512 or more. When the memory read address is smaller than 0 or 1024 or more, the read masking signal (16) is output.

In FIG. 3 (a), since the offset address is -512 at the very beginning of continuous scrolling, the memory read address is counted up to -512, the read masking signal (16) is output to the entire surface, and the screen A is displayed at all. Not not.

In (b), the offset address is -1, and the memory read address is counted up to -510. At this time, 512
Since the above is not the case, the page maximum address detection signal is not output, but a 1-bit read masking signal of -1 is output, and the screen A is displayed 1 bit before the reference position.

In (c), when the offset address is 2, the memory read address is counted from 2 to 513. At this time,
The read masking signal is not output, but the page maximum address detection signal is output at the timing corresponding to 512 and 513. At this time, the screen B is projected by 2 bits while the screen A is advanced by 2 bits from the reference position.

In (d), when the offset address is 510, the memory read address is counted from 510 to 1021. At this time, the read masking signal is not output, but the page maximum address detection signal is output at the timing corresponding to 512 to 1021. At this time, the screen A is projected by 2 bits while the screen B is located by 2 bits before the reference position.

In (e), when the offset address is 513, memory read addresses 513 to 1024 are counted. At this time, since the continuous scroll command signal is already "L", the page command signal is output as it is as the read page switching signal, and the 1-bit read masking signal corresponding to 1024 is output. At this time, screen B is 1 from the reference position.
It is projected with a bit advanced.

In (f), the offset address is 1022, and the memory read address is counted from 1022 to 1533. Also at this time, the page command signal is output as it is, and 1024 to 15
The read masking signal is output at the timing corresponding to 33.

At this time, only the last 2 bits of the screen B are displayed.

In (g), when the offset address is 1024, the memory read address is counted from 1024 to 1535. At this time, a read masking signal is output on the entire surface, and in this state, continuous scrolling is completed.

Although the case of two pages has been described above, the same can be considered when the number of pages is increased. At this time, it can be realized by increasing the number of bits of the page command signal and the read page switching signal.

Further, although the horizontal scroll has been described, it goes without saying that the same applies to the vertical scroll.

〔The invention's effect〕

As described above, according to the present invention, when reading from the memory, it is possible to read the character / pattern information of two pages at the same time by switching the read page every time the maximum page address is detected. By changing the command address of the circuit at a constant interval in synchronization with the video signal, it is possible to continuously scroll a plurality of character / pattern information stored in the memory.

[Brief description of drawings]

1 to 3 are views showing an embodiment of the present invention.
FIG. 2 is a block diagram showing the structure, FIG. 2 is a diagram showing an example of a read page switching circuit, and FIG. 3 is a horizontal counter, an offset address command circuit, and a page command when two screens are continuously scrolled horizontally. It is a figure which shows the example of the relationship between the switching timing of a signal and a continuous scroll signal, and the video of a monitor television. 4 to 6 are diagrams for explaining a conventional embodiment, and FIG. 4 is a block diagram showing a conventional embodiment, and FIG.
FIG. 6 is a diagram showing an example when it is used in a video camera, and FIG. 6 is a diagram showing a relationship between a horizontal counter, an offset address counter, an image of a monitor television, and a read masking signal when a title image is horizontally scrolled. . 2: Detection circuit, 4: Serial-parallel conversion circuit, 5: Parallel-serial conversion circuit, 6: Memory, 11: Controller, 13: Character superposition circuit, 15: Offset address designation circuit, 29: Read page switching circuit, 24: Page Maximum address detection circuit, 25: Page command circuit, 26: Continuous scroll command signal In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] 1. A means for digitizing an input video signal to form image data, a memory means for storing a plurality of pieces of the image data, and an address read from the memory means in writing in synchronization with a field or a frame. An offset address setting means for giving an offset to the read address, a read page switching means for detecting the end point of the read address of one screen and switching to the address of the next screen when the read address is offset, Characters from the read image data
A character / pattern storage / reproduction device comprising means for forming pattern information and means for superimposing the character / pattern information on a video signal.