JPH088478B2 - Analog switch circuit - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog switch circuit composed of 2-input and 1-output bipolar transistors.

2. Description of the Related Art First, the configuration of a conventional one-input, one-output analog switch will be described with reference to FIG.

The emitters of the two NPN transistors T1 and T3 are connected to each other and further to the first constant current circuit 1. The collectors of the two NPN transistors T1 and T3 have two PNs.
An active load composed of P-transistors T4 and T5 is connected,
These are NPN transistors T1, T3, constant current circuit (1), PNP
The transistors T4 and T5 form a differential amplifier circuit. The collector of the NPN transistor T3, which is the output of this differential amplifier circuit, is connected to the base of the NPN transistor T6, and the collector of this NPN transistor T6 is connected to the DC voltage source V _CC .
The emitter is the second constant current circuit 2 and the NPN transistor T.
It is connected to the base of 3 and is taken out as the output O of the analog switch circuit, and the input signal I is input from the base of the NPN transistor T1. Further, by providing the switch circuit 5 that connects and disconnects the first constant current circuit 1 and the second constant current circuit 2 with the switch signal S, the conventional one-input, one-output analog switch is configured. .

An equivalent circuit of the above-mentioned one-input, one-output analog switch circuit can be represented by the analog switch 3 as shown in FIG.

Next, when a conventional 2-input / 1-output analog switch is constructed, as shown in FIG. 6, two above-mentioned 1-input / 1-output analog switch circuits are used, and the respective outputs are made common, The output is set to O, and the switch signals to the two analog switch circuits are configured to be opposite to each other, that is, when one is in a conductive state, the other is in a cutoff state and is given to one through an inverter 4. Was there.

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention In the above-described configuration of the conventional 2-input, 1-output analog switch, the number of elements required is twice that of the 1-input, 1-output analog switch, and there is a drawback that the number of elements increases. .

The present invention is intended to solve the above problems and provides an analog switch with two inputs and one output that can be configured with a small number of elements.

Means for Solving the Problems The emitters and collectors of the first and second NPN transistors are commonly connected to each other, and the emitter of the first NPN transistor and the emitter of the third NPN transistor are connected to each other. No. 1 on the emitter side of the NPN transistor
Constant current circuits are connected, and active loads are connected to the collector sides of the first and third NPN transistors, respectively, and the first, second and third NPN transistors and the first constant current circuit are connected. And a differential amplifier circuit is constituted by an active load, and the base of the fourth NPN transistor is connected to the collector of the third NPN transistor which is the output of this differential amplifier circuit.
The collector of the fourth NPN transistor is connected to the DC power supply, the emitter is connected to the second constant current circuit to be the output of the analog switch circuit, and the base of the third NPN transistor is connected via the resistor R3. Return, the first
To the bases of the second and second NPN transistors, through the resistors R1 and R2 having the same value as the resistor R3,
The first and second input signals I1 and I2 are connected so that they can be applied, and when one of the first and second input signals I1 and I2 is conductive, the other is cut off. Two
The NPN transistor base and the switch circuit connected between the reference potentials are connected together.

Operation With the first and second input signals I1 and I2 being applied, the second NPN transistor T2 is turned on by the switch signal S.
Is cut off, the first NPN transistor T1
The first input signal I1 becomes conductive, and conversely, the first input signal I1 becomes conductive.
2nd NPN when the NPN transistor T1 of
The transistor T2 is in a state in which the second input signal I2 can be conducted.

Embodiment Hereinafter, an analog switch circuit according to an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a diagram showing an embodiment of the present invention, in which two NPN transistors T1 and T2, whose emitters and collectors are commonly connected, are further provided on the emitter side.
3 emitters are connected and 3 NPN transistors T1, T2, T3
A constant current source 1 connected to the emitter connection point side of and the active load connected to the collector side constitute a differential amplifier circuit.

Here, the active load consists of two PNP transistors T4 and T5, the bases of both are common, the emitters are both connected to the DC power supply V _CC , the collector and the base of the PNP transistor T4 are connected, and the NPN transistor T1 is connected. , The collector of T2 is connected to the connection point, while the collector of PNP transistor T5 is connected to the collector of NPN transistor T3.

NP that is the output of the differential amplifier circuit configured as described above
The collector of the N-transistor T3 is connected to the base of the NPN transistor T6, the collector of the NPN transistor T6 is connected to the DC power supply V _CC , and the emitter is connected to the constant current circuit 2, which serves as the output O of the analog switch circuit and the resistor R3. Is fed back to the base of the NPN transistor T3 via.

On the other hand, the bases of the NPN transistors T1 and T2 are respectively connected to the resistors R1 and R2 having the same value as the resistor R3, and the input signals I1 and I2 are input via these resistors R1 and R2. Here, the values of the resistors R1, R2, and R3 are made equal so that the values of the offset voltage generated by the base current are made uniform.

Further, the switch signal S has an emitter whose reference potential is 6
The collector of the NPN transistor T1 is connected to the base of the NPN transistor T7.
Control the conduction and cutoff of the NPN transistor T
It is input to the base of 8 and controls the conduction and interruption of the input signal I2 via the NPN transistor T9.

Here, the emitter of the NPN transistor T8 is connected to the reference potential 6 and the collector is connected to the base of the NPN transistor T9 and the DC power supply V _CC via the resistor R4. The emitter of the NPN transistor T9 is connected to the reference potential 6 The collector is NP
It is connected to the base of the N-transistor T2.

The above-mentioned two-input, one-output analog switch circuit can be represented by an equivalent circuit of the analog switches 3, 3'and the inverter 4 as shown in FIG.

In the analog switch circuit according to the embodiment of the present invention configured as described above, when the input signals I1 and I2 are input, the switch signal S has a potential that makes the NPN transistors T7 and T8 sufficiently conductive. Then, the collectors of the NPN transistors T7 and T8 become the reference potential 6 and the NPN transistor
NP whose base is connected to the collector of transistor T7
The N transistor T1 is turned off. On the other hand, the NPN transistor T9 whose base is connected to the collector of the NPN transistor T8 is also in the cutoff state, and the base is connected to the collector of this NPN transistor T9. The NPN transistor T2 becomes a state in which the input signal I2 can be conducted. On the contrary, when the switch signal S is less than the voltage for making the NPN transistors T7 and T8 conductive, the NPN transistor T7 is in the cutoff state.
The NPN transistor T1 whose base is connected to the collector of the NPN transistor T7 makes it possible to conduct the input signal I1, while the collector of the NPN transistor T8 is almost at the potential of the DC power supply V _CC , and the NPN transistor T9 is turned on. In the conductive state, the collector of the NPN transistor T9 becomes approximately the reference potential 6, and the NPN transistor T2 whose base is connected to the collector of the NPN transistor T9 is cut off.
Therefore, the switch signal S causes two input signals I1, I2
Only one of them becomes conductive and the output signal O
, And a 2-input, 1-output analog switch circuit can be configured. The above operation will be described with reference to waveforms. As shown in FIGS. 3A, 3B, 3C, and 3D, input signals I1 and I2 have different frequencies. In this state, when the switch signal S is 0V,
The low frequency input signal I1 is output as the output signal O, and when the switch signal S is 5V, the high frequency input signal I2 is output as the output signal O.

EFFECTS OF THE INVENTION According to the present invention, an analog switch circuit composed of a 2-input and 1-output bipolar transistor can be realized with a simple configuration, and the number of circuit elements can be significantly reduced.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing one embodiment of the present invention, FIG. 2 is an equivalent circuit diagram thereof, FIG. 3 is an operation waveform diagram of one embodiment of the present invention, and FIG. FIG. 5 is a circuit diagram showing a 1-output analog switch circuit, FIG. 5 is an equivalent circuit diagram thereof, and FIG. 6 is a circuit diagram showing a conventional 2-input, 1-output analog switch circuit. 1 ... 1st constant current circuit, 2 ... 2nd constant current circuit, 3,
3 '... Analog switch, 4 ... Inverter, 5,5' ...
… Switch circuit, 6 …… reference potential.

Claims (1)

[Claims] 1. An emitter and a collector of a first and a second NPN transistor are commonly connected to each other, and the first NPN transistor is further connected.
The emitter of the transistor and the emitter of the third NPN transistor are connected, and the first constant current circuit is connected to the emitter side of the first NPN transistor.
An active load is connected to each collector side of the transistors, and a differential amplifier circuit is configured by these first, second, and third NPN transistors, the first constant current circuit, and the active load. The collector of the third NPN transistor, which is the output of the amplifier circuit, is connected to the base of the fourth NPN transistor, the collector of this fourth NPN transistor is connected to the DC power supply, and the emitter is the second constant current circuit. Connected to the output of the analog switch circuit,
Is fed back to the base of the NPN transistor via a resistor R3, and the base of each of the first and second NPN transistors receives a first resistor R1 and a second resistor R1 having a value equal to the resistor R3.
And the second input signals I1 and I2 are connected so that they can be applied, and when one of the first and second input signals I1 and I2 is in a conductive state, the other is in a cutoff state.
And an analog switch circuit comprising a switch circuit connected between the base of the second NPN transistor and the reference potential.