JPS6096905A - Transistor circuit - Google Patents

Abstract

PURPOSE:To attain output inversion with a wide output dynamic range by providing two transistors (TRs) whose emitters are connected mutually and two current mirror circuits connected to collectors of the TRs. CONSTITUTION:When a bias voltage is given to an input terminal 12 to use a TR15 as a current source and then the current mirror circuit 18 is turned off by operating a switch 21, an output signal with the same polarity as that of an input signal fed to an input terminal 11 is obtained at an output terminal 13. On the other hand, in turning off the current mirror circuit 17 by activating a switch 19, the output signal with opposite polarity to that of the input signal is obtained. The output dynamic range is widened by setting a potential of a bias source 22 connected to one of a load 20 and the potential of a bias source 22 is switched at each polarity of the output signal so as to set optionally each operating point and the dynamic range.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a transistor circuit, and more particularly, to a transistor circuit suitable for an integrated circuit that controls the polarity of an output signal relative to an input signal in response to a switching signal.

As such a transistor circuit, a double-balanced differential amplifier circuit, as shown in FIG. 1, has conventionally been used. That is, a tenth differential amplifier consisting of transistors 4 and 5, a second differential amplifier consisting of transistors 6 and 7, and respective collectors connected to the common emitters of transistors 4 and 5 and the common emitters of transistors 6 and 7. A third differential amplifier composed of transistors 1 and 2 constitutes a double-balanced differential amplifier. A current source 3 is connected to the common emitters of transistors 1 and 2 in the third differential amplifier, and the bases of transistors 1 and 20, which serve as 70 differential inputs, are connected to input terminals 11 and 12, respectively. The bases of transistors 5' and 6 in the first and second differential amplifiers are commonly connected to a reference power supply lO, and the bases of transistors 4 and 7 are commonly connected to a switching signal input terminal 8. The collectors of transistors 4 and 6 are connected to the VCC power supply, and the collectors of transistors 5 and 7 are commonly connected and connected to the VCC power supply via a load resistor 20 and to the output terminal 13.

Next, the operation of the circuit shown in FIG. 1 will be explained. A voltage higher than the reference power supply 10 is applied to the switching signal input terminal 8 so that the transistor 4.7 becomes conductive and the transistor 5.6 becomes non-conductive, a bias voltage is applied to the input terminal 12, and the input terminal 11 When a signal is applied, an output signal having the same polarity as the input signal appears at the output terminal 13. Next, when a voltage lower than the reference power supply 10 is applied to the switching signal input terminal 8 so that the transistors 5 and 6 become conductive and the transistors 4 and 7 become non-conductive, the output terminal 13 receives an output with the opposite polarity to the input signal. A signal appears. In this way, the circuit shown in FIG. 1 can control the polarity of the input signal according to the voltage level of the switching terminal 8.

However, with the configuration shown in FIG. 1, it is not possible to obtain an output signal amplitude from approximately the ground potential to the VCC voltage.

In other words, a wide output dynamic range cannot be obtained. Further, there is a drawback that the DC voltage at the output terminal 13 is also subject to restrictions.

SUMMARY OF THE INVENTION An object of the present invention is to provide a transistor circuit which provides a sufficient output dynamic range and which controls the polarity of an output signal with respect to an input signal whose circuit constants can be easily determined.

The present invention includes first and second transistors connected in cascade and having opposite polarities to which an input signal is supplied to at least one of them, a first current mirror circuit whose input terminal is connected to the first transistor, and a second transistor. a second current mirror circuit whose input end is connected to the transistor and whose output end is connected to the output end of the first current mirror circuit; and a switch circuit that controls the operating states of the first and second current mirror circuits. and that the output signal is obtained from the common output terminal of the first and second current mirror circuits.

Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 2 shows a basic configuration diagram of the present invention. In FIG. 2, a first transistor 14 and a second transistor 15 with a common emitter resistor 16 connected between their emitters have different conductivities, and the base of the first transistor 140 is connected to the first input terminal 11. , and the base of the second transistor 150 is connected to the second input terminal 12 . Current mirror circuit WI11 of the first transistor 14
The collector of the second transistor 15 is connected to the input end of the second current mirror circuit 18 . First and second current mirror circuits 17.
Each output terminal of 18 is connected to a common load 20 connected to a bias source 22 and further connected to an output terminal 13 . First and second current mirror circuits 17
．． The operating state of 18 is controlled by switch circuits 19.20.

Now, if an appropriate bias voltage is applied to the second input terminal 12, the transistor 15 becomes a current source, and the switch 21 is activated to turn off the current mirror circuit 18.
An output signal of the same polarity as the input signal supplied to the first input terminal 11 is obtained at the output terminal 13. On the other hand, switch 1
9 works to interrupt the current mirror circuit 17,
An output signal of opposite polarity to the input signal is obtained. In this way, the polarity of the output signal relative to the input signal can be controlled. Furthermore, by setting the potential of the bias source 22 connected to one side of the load 20, the dynamic range of the output can be widened.
Furthermore, by switching the potential of the bias source 22 for each polarity of the output signal, each operating point and dynamic range can be set arbitrarily. Since the switches 19 and 20 can be constructed from transistors, the circuit has a relatively simple construction and is suitable for integration.

FIG. 3 shows a specific embodiment of the present invention and will be described in detail. Elements that are the same as in FIG. 2 are designated by the same numbers. In FIG. 3, transistor 14. The base of each transistor 15 is connected to the input terminals 11.12, and a resistor 16 is connected between the emitters of each transistor 14.15. The PNP transistors 23 and 24 constitute a first current mirror circuit 17, and the collector of the transistor 14 is connected to the :I collector (ie, input terminal) of the diode-connected transistor 23. The NPN transistors 26 and 27 constitute a second current mirror circuit 18, and the collector (input end) of the diode-connected transistor 26 is connected to the collector of the transistor 15. 1st. The output terminals of the second current mirror circuits 17 and 18 (that is, the collectors of the transistors 24 and 27) are commonly connected, and are connected to the resistor 29 constituting the load 20 and to the output terminal 13. Load resistance 29
On the opposite side is the transistor 3 that constitutes the bias source 22.
0 and 31 common collector.

The emitter of the transistor 31 connected to the terminal 36 is grounded, and its base is connected to the switching signal input terminal 36 through the resistor 33. Transistor 25 and resistor 34 constitute switch circuit 19, the collector of transistor 25 is connected to the common base of transistors 23 and 24 forming first current mirror circuit 17, and the emitter thereof is connected to power supply VCc. Transistor 28 and resistor 35 constitute switch circuit 21. transistor 28
The collector of the transistor is connected to the common base of the transistors 26 and 27, which are the second current mirror circuit, and the emitter thereof is grounded. The other ends of the resistors 34 and 35 are connected to the switching signal input terminal 36.

Next, the operation of this circuit will be explained. Note that for ease of explanation, it is assumed that Vcz (sat) = 0. A suitable bias is applied to the input terminal 12 to make the transistor 15 a current source, and a power supply voltage, for example, is applied to the switching signal input terminal 36. Transistor 25 of switch circuit 19.20.
Since the power supply voltage is applied to the switching signal input terminal 36 of the transistor 28, the transistor 28 becomes conductive and the transistor 25 becomes non-conductive. Therefore, the first current mirror circuit 17 consisting of transistors 23 and 24 becomes conductive, but the transistors 26 and 2
The second current circuit 18 consisting of 7 becomes non-conductive. Also, the transistor 30 is non-conductive, and the transistor 30 is non-conductive.
1 is conductive, so the potential on the side opposite to the output terminal 13 of the load resistor 29 becomes the GND potential.

In this state, when an input signal is input to the input terminal 11, a current proportional to the input signal flows into the resistor 29,
As a result, an output signal having the same polarity as the input signal appears at the output terminal 13. Next, when the switching signal input terminal 36 is grounded, the transistors 28 and 31 become non-conductive, contrary to the case where the power supply voltage was applied as described above, and the transistors 25 and 25.
30 becomes conductive, so the second current mirror circuit 18
becomes conductive, and the potential on the opposite side of the load resistor 29 to the output terminal 13 becomes VCC. In this state, when an input signal is applied to the input terminal 11, the second current mirror circuit 18 draws a current proportional to the current flowing through the transistor 14.15 from the load resistor 29, and as a result, the input signal is applied to the output terminal 13. An output signal of opposite polarity will appear.

Note that the same effect can be obtained by applying the input signal to the second input terminal 12 or by applying the input signal to both input terminals 11 and 12.

In this way, the circuit shown in FIG. 3 can easily reverse the polarity of output No. 1- by simply changing the voltage at the switching signal input terminal 36. Further, the dynamic range of the output can be wide because the output signal changes from the ground potential to Vcc [pressure], and furthermore, the DC'IL level of the output terminal 13 can be set arbitrarily. Furthermore, subtraction of two human input signals can be performed simultaneously, and the gain of each polarity can be set separately by changing the current ratio of the first and second current mirror circuits 17 and 18.

Another embodiment of the invention is shown in FIG. The same parts as in FIG. 3 are indicated by the same numbers. To note only the differences with Fig. 3, the load resistance 29 in Fig. 3 is different from the load resistance 37.38 and 2.
transistors 30. transistor 3
1 collector, and the opposite side is commonly connected to the 1st collector. It is connected to the collector of the transistor 24, 27 of the second current mirror circuit 17, 18, and serves as the output terminal 13. It goes without saying that the operation in FIG. 4 is exactly the same as that in FIG. 3. Therefore, the circuit shown in FIG. 4 has the same effect as the embodiment shown in FIG.
Furthermore, by changing the values of the resistors 37 and 38, the gain can be changed for each polarity of the output signal.

As described above, according to the present invention, in an electronic circuit for inverting the polarity of an output signal, the polarity can be easily inverted, the electronic circuit can be configured with a relatively simple circuit, and it is suitable for integration into an integrated circuit.

[Brief explanation of drawings]

Fig. 1 is a circuit connection diagram showing a conventional example, Fig. 2 is a basic circuit configuration diagram of the present invention, Fig. 3 is a circuit connection diagram showing one embodiment of the present invention, and Fig. 4 is another embodiment of the present invention. FIG. 3 is a circuit connection diagram showing an example. 17.18...Current mirror circuit, 19.2
1...Switch circuit, 20...Load,
1,2.4~7゜14.15.23~28,30.31
...transistor, 16.29.32-35,
37.38...Resistance, 11.12...
Input terminal, 13... Output terminal, 10.12...
...Bias source, 8,36...Switching signal input terminal, 3...Current source. Cc Figure 1 Figure 2 Section 3

Claims (1)

[Claims] first and second transistors whose emitters are coupled to each other and whose bases are supplied with an input signal; and a first current mirror circuit whose input end is connected to the collector of the first transistor. , a second current mirror circuit whose input terminal is connected to the collector of the second transistor, and a switch circuit that controls the operating states of the first and second current mirror circuits, A transistor circuit whose characteristic is to obtain an output signal by coupling respective output terminals of a second current mirror circuit.