JPH10189762A - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法

Info

Publication number
JPH10189762A
JPH10189762A JP8340694A JP34069496A JPH10189762A JP H10189762 A JPH10189762 A JP H10189762A JP 8340694 A JP8340694 A JP 8340694A JP 34069496 A JP34069496 A JP 34069496A JP H10189762 A JPH10189762 A JP H10189762A
Authority
JP
Japan
Prior art keywords
voltage
type
region
mos transistor
conductivity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8340694A
Other languages
English (en)
Japanese (ja)
Inventor
Toshihiko Ichikawa
俊彦 市川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP8340694A priority Critical patent/JPH10189762A/ja
Priority to EP97122323A priority patent/EP0849801A3/fr
Priority to CNB971220980A priority patent/CN1135623C/zh
Publication of JPH10189762A publication Critical patent/JPH10189762A/ja
Priority to US09/609,352 priority patent/US6451640B1/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/856—Complementary IGFETs, e.g. CMOS the complementary IGFETs having different architectures than each other, e.g. high-voltage and low-voltage CMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0191—Manufacturing their doped wells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/859—Complementary IGFETs, e.g. CMOS comprising both N-type and P-type wells, e.g. twin-tub

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP8340694A 1996-12-20 1996-12-20 半導体装置およびその製造方法 Pending JPH10189762A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP8340694A JPH10189762A (ja) 1996-12-20 1996-12-20 半導体装置およびその製造方法
EP97122323A EP0849801A3 (fr) 1996-12-20 1997-12-17 Dispositif semiconducteur comprenant des transistors MOS du type N et P sur un substrat commun et méthode de fabrication
CNB971220980A CN1135623C (zh) 1996-12-20 1997-12-22 在同一衬底上具有n和p型场效应晶体管的半导体器件
US09/609,352 US6451640B1 (en) 1996-12-20 2000-07-05 Semiconductor device having NMOS and PMOS transistors on common substrate and method of fabricating the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8340694A JPH10189762A (ja) 1996-12-20 1996-12-20 半導体装置およびその製造方法

Publications (1)

Publication Number Publication Date
JPH10189762A true JPH10189762A (ja) 1998-07-21

Family

ID=18339424

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8340694A Pending JPH10189762A (ja) 1996-12-20 1996-12-20 半導体装置およびその製造方法

Country Status (4)

Country Link
US (1) US6451640B1 (fr)
EP (1) EP0849801A3 (fr)
JP (1) JPH10189762A (fr)
CN (1) CN1135623C (fr)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000068385A (ja) * 1998-08-21 2000-03-03 Hitachi Ltd Ｍｏｓトランジスタの製造方法
US6501147B1 (en) * 1999-11-19 2002-12-31 Stmicroelectronics S.R.L. Process for manufacturing electronic devices comprising high voltage MOS transistors, and electronic device thus obtained
US6869847B2 (en) 2001-08-30 2005-03-22 Sony Corporation Semiconductor device manufacturing method thereof
JP2006324346A (ja) * 2005-05-17 2006-11-30 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
KR100903483B1 (ko) 2007-11-26 2009-06-18 주식회사 동부하이텍 반도체 소자의 제조방법
JP2010016153A (ja) * 2008-07-03 2010-01-21 Seiko Epson Corp 半導体装置の製造方法および半導体装置
KR100961549B1 (ko) 2003-07-29 2010-06-07 매그나칩 반도체 유한회사 고전압 트랜지스터 및 로직 트랜지스터를 갖는 반도체 소자
JP2012156388A (ja) * 2011-01-27 2012-08-16 Fujitsu Semiconductor Ltd Ｍｏｓトランジスタおよび半導体集積回路装置の製造方法
JP2014165503A (ja) * 2013-02-27 2014-09-08 Fitipower Integrated Technology Inc 表示装置及びその半導体デバイス

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10189762A (ja) * 1996-12-20 1998-07-21 Nec Corp 半導体装置およびその製造方法
US6693331B2 (en) * 1999-11-18 2004-02-17 Intel Corporation Method of fabricating dual threshold voltage n-channel and p-channel MOSFETS with a single extra masked implant operation
SE519382C2 (sv) * 2000-11-03 2003-02-25 Ericsson Telefon Ab L M Integrering av självinriktade MOS-högspänningskomponenter samt halvledarstruktur innefattande sådana
DE10225860B4 (de) * 2001-06-11 2006-11-09 Fuji Electric Co., Ltd., Kawasaki Halbleiterbauteil
JP2003197908A (ja) * 2001-09-12 2003-07-11 Seiko Instruments Inc 半導体素子及びその製造方法
US6710424B2 (en) 2001-09-21 2004-03-23 Airip RF chipset architecture
JP3719192B2 (ja) * 2001-10-26 2005-11-24 セイコーエプソン株式会社 半導体装置の製造方法
JP3546037B2 (ja) * 2001-12-03 2004-07-21 松下電器産業株式会社 半導体装置の製造方法
JP2003258120A (ja) * 2002-03-07 2003-09-12 Seiko Epson Corp 半導体装置の製造方法
US7253276B2 (en) * 2003-01-03 2007-08-07 The Texas A&M University System Stem-regulated, plant defense promoter and uses thereof in tissue-specific expression in monocots
WO2004090983A1 (fr) * 2003-04-04 2004-10-21 Fujitsu Limited Dispositif a semi-conducteur et son procede de production
JP2004311891A (ja) * 2003-04-10 2004-11-04 Seiko Instruments Inc 半導体装置
JP4707947B2 (ja) * 2003-11-14 2011-06-22 ルネサスエレクトロニクス株式会社 半導体装置
US7091556B2 (en) * 2003-12-24 2006-08-15 Texas Instruments Incorporated High voltage drain-extended transistor
WO2006018974A1 (fr) * 2004-08-17 2006-02-23 Rohm Co., Ltd. Dispositif semi-conducteur et procédé de fabrication dudit dispositif
JP4956987B2 (ja) * 2005-12-16 2012-06-20 株式会社島津製作所 レーザー結晶化装置及び結晶化方法
KR100690924B1 (ko) * 2005-12-21 2007-03-09 삼성전자주식회사 반도체 집적 회로 장치와 그 제조 방법
KR100760917B1 (ko) * 2006-10-27 2007-09-21 동부일렉트로닉스 주식회사 고전압 반도체 소자의 제조방법
KR100917216B1 (ko) * 2007-02-02 2009-09-16 삼성전자주식회사 반도체 소자 및 그 형성방법
DE102007034800A1 (de) * 2007-03-26 2008-10-02 X-Fab Dresden Gmbh & Co. Kg Maskensparende Herstellung komplementärer lateraler Hochvolttransistoren mit RESURF-Struktur
US8247280B2 (en) 2009-10-20 2012-08-21 Taiwan Semiconductor Manufacturing Company, Ltd. Integration of low and high voltage CMOS devices
DE102010014370B4 (de) * 2010-04-09 2021-12-02 X-Fab Semiconductor Foundries Ag LDMOS-Transistor und LDMOS - Bauteil
CN102446961B (zh) * 2011-12-09 2014-05-28 无锡中星微电子有限公司 包含功率器件的半导体装置及其制备方法
JP6115056B2 (ja) * 2012-09-18 2017-04-19 株式会社Ｊｖｃケンウッド 液晶表示装置
US9548307B2 (en) * 2014-06-30 2017-01-17 Alpha And Omega Semiconductor Incorporated Compact CMOS device isolation
CN108847423B (zh) * 2018-05-30 2022-10-21 矽力杰半导体技术(杭州)有限公司 半导体器件及其制造方法

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DE2940954A1 (de) 1979-10-09 1981-04-23 Nixdorf Computer Ag, 4790 Paderborn Verfahren zur herstellung von hochspannungs-mos-transistoren enthaltenden mos-integrierten schaltkreisen sowie schaltungsanordnung zum schalten von leistungsstromkreisen unter verwendung derartiger hochspannungs-mos-transistoren
FR2571178B1 (fr) * 1984-09-28 1986-11-21 Thomson Csf Structure de circuit integre comportant des transistors cmos a tenue en tension elevee, et son procede de fabrication
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US5043788A (en) * 1988-08-26 1991-08-27 Mitsubishi Denki Kabushiki Kaisha Semiconductor device with functional portions having different operating voltages on one semiconductor substrate
US5047358A (en) * 1989-03-17 1991-09-10 Delco Electronics Corporation Process for forming high and low voltage CMOS transistors on a single integrated circuit chip
US4918026A (en) * 1989-03-17 1990-04-17 Delco Electronics Corporation Process for forming vertical bipolar transistors and high voltage CMOS in a single integrated circuit chip
JP2861624B2 (ja) * 1992-05-13 1999-02-24 日本電気株式会社 半導体装置の製造方法
JPH06295863A (ja) 1993-04-08 1994-10-21 Japan Energy Corp 高抵抗化合物半導体の製造方法
US5468666A (en) 1993-04-29 1995-11-21 Texas Instruments Incorporated Using a change in doping of poly gate to permit placing both high voltage and low voltage transistors on the same chip
US5472887A (en) * 1993-11-09 1995-12-05 Texas Instruments Incorporated Method of fabricating semiconductor device having high-and low-voltage MOS transistors
JP2920061B2 (ja) 1994-02-04 1999-07-19 モトローラ株式会社 高負荷駆動ドライバ用半導体集積装置及び高負荷駆動ドライバ装置
KR100331127B1 (ko) * 1994-02-15 2002-10-18 내셔널 세미콘덕터 코포레이션 표준cmos공정용고전압cmos트랜지스터
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US5498554A (en) * 1994-04-08 1996-03-12 Texas Instruments Incorporated Method of making extended drain resurf lateral DMOS devices
JPH08191107A (ja) * 1995-01-11 1996-07-23 Mitsubishi Electric Corp 半導体装置とその製造方法
JP3386101B2 (ja) * 1996-08-29 2003-03-17 シャープ株式会社 半導体装置の製造方法
JPH10189762A (ja) * 1996-12-20 1998-07-21 Nec Corp 半導体装置およびその製造方法

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000068385A (ja) * 1998-08-21 2000-03-03 Hitachi Ltd Ｍｏｓトランジスタの製造方法
US6501147B1 (en) * 1999-11-19 2002-12-31 Stmicroelectronics S.R.L. Process for manufacturing electronic devices comprising high voltage MOS transistors, and electronic device thus obtained
US6869847B2 (en) 2001-08-30 2005-03-22 Sony Corporation Semiconductor device manufacturing method thereof
US7122861B2 (en) 2001-08-30 2006-10-17 Sony Corporation Semiconductor device and manufacturing method thereof
KR100961549B1 (ko) 2003-07-29 2010-06-07 매그나칩 반도체 유한회사 고전압 트랜지스터 및 로직 트랜지스터를 갖는 반도체 소자
JP2006324346A (ja) * 2005-05-17 2006-11-30 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
KR100903483B1 (ko) 2007-11-26 2009-06-18 주식회사 동부하이텍 반도체 소자의 제조방법
JP2010016153A (ja) * 2008-07-03 2010-01-21 Seiko Epson Corp 半導体装置の製造方法および半導体装置
US7972917B2 (en) 2008-07-03 2011-07-05 Seiko Epson Corporation Method for manufacturing semiconductor device and semiconductor device
JP2012156388A (ja) * 2011-01-27 2012-08-16 Fujitsu Semiconductor Ltd Ｍｏｓトランジスタおよび半導体集積回路装置の製造方法
US8981472B2 (en) 2011-01-27 2015-03-17 Fujitsu Semiconductor Limited MOS transistor and fabrication method of semiconductor integrated circuit device
JP2014165503A (ja) * 2013-02-27 2014-09-08 Fitipower Integrated Technology Inc 表示装置及びその半導体デバイス

Also Published As

Publication number Publication date
EP0849801A3 (fr) 1998-09-23
CN1135623C (zh) 2004-01-21
EP0849801A2 (fr) 1998-06-24
US6451640B1 (en) 2002-09-17
CN1189694A (zh) 1998-08-05

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