JPS5314560A - Production of semiconductor device - Google Patents

Production of semiconductor device

Info

Publication number
JPS5314560A
JPS5314560A JP8940476A JP8940476A JPS5314560A JP S5314560 A JPS5314560 A JP S5314560A JP 8940476 A JP8940476 A JP 8940476A JP 8940476 A JP8940476 A JP 8940476A JP S5314560 A JPS5314560 A JP S5314560A
Authority
JP
Japan
Prior art keywords
production
semiconductor device
forming
grooves
evade
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8940476A
Other languages
Japanese (ja)
Inventor
Masanobu Obara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP8940476A priority Critical patent/JPS5314560A/en
Publication of JPS5314560A publication Critical patent/JPS5314560A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/701—Tape-automated bond [TAB] connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE: To employ simultaneous bonding and evade shorting faults between internal leads and chips by forming dicing grooves then forming a surface protecting film over the entire surface so as to cover the grooves as well.
COPYRIGHT: (C)1978,JPO&Japio
JP8940476A 1976-07-26 1976-07-26 Production of semiconductor device Pending JPS5314560A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8940476A JPS5314560A (en) 1976-07-26 1976-07-26 Production of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8940476A JPS5314560A (en) 1976-07-26 1976-07-26 Production of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5314560A true JPS5314560A (en) 1978-02-09

Family

ID=13969693

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8940476A Pending JPS5314560A (en) 1976-07-26 1976-07-26 Production of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5314560A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04236434A (en) * 1991-01-21 1992-08-25 Toshiba Corp Semiconductor device and manufacture thereof
US5691248A (en) * 1995-07-26 1997-11-25 International Business Machines Corporation Methods for precise definition of integrated circuit chip edges
US5705425A (en) * 1992-05-28 1998-01-06 Fujitsu Limited Process for manufacturing semiconductor devices separated by an air-bridge

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04236434A (en) * 1991-01-21 1992-08-25 Toshiba Corp Semiconductor device and manufacture thereof
US5705425A (en) * 1992-05-28 1998-01-06 Fujitsu Limited Process for manufacturing semiconductor devices separated by an air-bridge
US5691248A (en) * 1995-07-26 1997-11-25 International Business Machines Corporation Methods for precise definition of integrated circuit chip edges
US5925924A (en) * 1995-07-26 1999-07-20 International Business Machines Corporation Methods for precise definition of integrated circuit chip edges

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