JPS55147701A - Tracking method in multi-computer system - Google Patents
Tracking method in multi-computer systemInfo
- Publication number
- JPS55147701A JPS55147701A JP5527379A JP5527379A JPS55147701A JP S55147701 A JPS55147701 A JP S55147701A JP 5527379 A JP5527379 A JP 5527379A JP 5527379 A JP5527379 A JP 5527379A JP S55147701 A JPS55147701 A JP S55147701A
- Authority
- JP
- Japan
- Prior art keywords
- tracking
- computers
- information
- zone
- computer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title abstract 2
- 230000005540 biological transmission Effects 0.000 abstract 2
- 230000003139 buffering effect Effects 0.000 abstract 1
- 238000004519 manufacturing process Methods 0.000 abstract 1
- 238000004886 process control Methods 0.000 abstract 1
Landscapes
- Hardware Redundancy (AREA)
- Multi Processors (AREA)
- Feedback Control In General (AREA)
Abstract
PURPOSE: To prevent the production of missing of information, by performing the reception and transmission of information between computers and buffering, through the determination of the zone performing the tracking with one computer only and the zone performing the tracking through both computers.
CONSTITUTION: For process control, the computers 1 and 2 are for example, provided, and the storage area to perform the tracking information succeedingly when the computer is restored from failure with the auxiliary memory unit 3 and the area giving and receiving the data other than the tracking are given. Further, by sectioning the process line, the zone 1-1 performing the tracking with the computer 1 only and the zone 1-2 performing the tracking with the computers 1 and 2 are determined and the transmission and reception of information between computers are made, enabling to prevent the roduction of the missing of information.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5527379A JPS55147701A (en) | 1979-05-08 | 1979-05-08 | Tracking method in multi-computer system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5527379A JPS55147701A (en) | 1979-05-08 | 1979-05-08 | Tracking method in multi-computer system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS55147701A true JPS55147701A (en) | 1980-11-17 |
Family
ID=12993985
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5527379A Pending JPS55147701A (en) | 1979-05-08 | 1979-05-08 | Tracking method in multi-computer system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS55147701A (en) |
-
1979
- 1979-05-08 JP JP5527379A patent/JPS55147701A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS56129950A (en) | Information processor | |
| JPS56114062A (en) | Multiplex information process system | |
| JPS55146562A (en) | Electronic cash register | |
| JPS54140437A (en) | Parallel process system | |
| JPS57176465A (en) | Main storage control system | |
| JPS5714952A (en) | Doubled computer control system | |
| JPS5324743A (en) | Bus selector for electronic computer | |
| JPS5654564A (en) | Multiple computer system | |
| JPS54140439A (en) | Composite computer device | |
| JPS52129241A (en) | Memory control system | |
| JPS55147745A (en) | Data transfer unit between memory units | |
| STEIN et al. | Image processing system performance prediction and product quality evaluation[Final Report] | |
| JPS5567850A (en) | Information processor | |
| JPS54104247A (en) | Information processing system | |
| JPS5520565A (en) | Computer system | |
| JPS5697164A (en) | Test and set and test and reset system | |
| JPS57137938A (en) | Data processor | |
| JPS556674A (en) | Program interruption system | |
| JPS5520557A (en) | Control system for interruption of microprogram | |
| ES8506912A1 (en) | Method and means for memory bank selection in a microprocessing system. | |
| JPS5538609A (en) | Error recovery processing system for read-only memory | |
| JPS5478643A (en) | Read/write processing method for input/output device | |
| JPS55150032A (en) | Data transfer system | |
| Schultze et al. | Simulation as a tool to examine service system performance. | |
| JPS5622135A (en) | Constitution control system |