JPS5516452A - Method of manufacturing semiconductor device - Google Patents

Method of manufacturing semiconductor device

Info

Publication number
JPS5516452A
JPS5516452A JP8945778A JP8945778A JPS5516452A JP S5516452 A JPS5516452 A JP S5516452A JP 8945778 A JP8945778 A JP 8945778A JP 8945778 A JP8945778 A JP 8945778A JP S5516452 A JPS5516452 A JP S5516452A
Authority
JP
Japan
Prior art keywords
substrate
sio
layer
oxygen atmosphere
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8945778A
Other languages
Japanese (ja)
Inventor
Kazuo Yoneda
Motofumi Masaki
Masataka Ota
Takashi Azuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP8945778A priority Critical patent/JPS5516452A/en
Publication of JPS5516452A publication Critical patent/JPS5516452A/en
Pending legal-status Critical Current

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  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE: To improve the electrical characteristic by lowering the surface electric charge density Qss through the formation of SiO2 film with use of the hot heat treatment in oxygen atmosphere.
CONSTITUTION: On the surface of a Si substrate 1 grown is a Si epitaxial layer 2, on which a base area 4 and emitter area 6 are formed. Next, the substrate is heated at the temperature above 1150°C in oxygen atmosphere to form a thin SiO2 layer 7 of approx. 1000Å on the substrate. Then, the Si substrate 1 is placed within the CVD apparatus and a thick SiO2 ilm 8 is deposited on the thin SiO2 layer 7 by use of the CVD method. Finally, holes 9 for leading out the electrode are opened through the SiO2 films 7 and 8 on the substrate and then the electrode metal is evaporated therein to form electrodes 10, 11 and 12.
COPYRIGHT: (C)1980,JPO&Japio
JP8945778A 1978-07-24 1978-07-24 Method of manufacturing semiconductor device Pending JPS5516452A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8945778A JPS5516452A (en) 1978-07-24 1978-07-24 Method of manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8945778A JPS5516452A (en) 1978-07-24 1978-07-24 Method of manufacturing semiconductor device

Publications (1)

Publication Number Publication Date
JPS5516452A true JPS5516452A (en) 1980-02-05

Family

ID=13971222

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8945778A Pending JPS5516452A (en) 1978-07-24 1978-07-24 Method of manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPS5516452A (en)

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