JPS5529112A - Manufacturing of semiconductor - Google Patents
Manufacturing of semiconductorInfo
- Publication number
- JPS5529112A JPS5529112A JP10178478A JP10178478A JPS5529112A JP S5529112 A JPS5529112 A JP S5529112A JP 10178478 A JP10178478 A JP 10178478A JP 10178478 A JP10178478 A JP 10178478A JP S5529112 A JPS5529112 A JP S5529112A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- poly
- gate
- opening
- channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 238000004519 manufacturing process Methods 0.000 title 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 4
- 229910052681 coesite Inorganic materials 0.000 abstract 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract 2
- 230000010354 integration Effects 0.000 abstract 2
- 239000000377 silicon dioxide Substances 0.000 abstract 2
- 229910052682 stishovite Inorganic materials 0.000 abstract 2
- 229910052905 tridymite Inorganic materials 0.000 abstract 2
- 238000009792 diffusion process Methods 0.000 abstract 1
- 238000005530 etching Methods 0.000 abstract 1
- 150000002500 ions Chemical class 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 238000009279 wet oxidation reaction Methods 0.000 abstract 1
Landscapes
- Electrodes Of Semiconductors (AREA)
- Semiconductor Integrated Circuits (AREA)
- Weting (AREA)
Abstract
PURPOSE: To increase integration capacity of FET, by placing a gate layer with self-matching at channel range.
CONSTITUTION: Channel p-layer 18 is made through the process consisting of providing gate layer at the opening of field oxide film 12, making said gate layer conductive by laying CVD poly-Si layer 16 thereover, making selective opening, and injecting B ions through said film 12. Next, poly-Si 20 is deposited, a dope-poly-Si layer 20A is made by diffusion from said layer 16, and said layers 16 and 20A are changed into SiO2 layer 22 by about 750°C selective wet oxidation so that the rediffusion of p-layer 18 is small. Next, etching speed differential is used for selectively removing said layer 22, the gate pattern of poly-Si 20 is made, and openings are made inboth-side SiO2 films 14. Self-matched n+-type source 24 and drain 26 are made by diffusing p from said opening. Next, PSG 28 covering and an electrode are provided so that a semiconductor is completed. Thereby, gate layer 20 is placed on said channel 18 even with no margin for alignment so that high integration degree can be attained effectively.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10178478A JPS5529112A (en) | 1978-08-23 | 1978-08-23 | Manufacturing of semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10178478A JPS5529112A (en) | 1978-08-23 | 1978-08-23 | Manufacturing of semiconductor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5529112A true JPS5529112A (en) | 1980-03-01 |
Family
ID=14309802
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10178478A Pending JPS5529112A (en) | 1978-08-23 | 1978-08-23 | Manufacturing of semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5529112A (en) |
-
1978
- 1978-08-23 JP JP10178478A patent/JPS5529112A/en active Pending
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