JPS5570042A - Fabricating method of semiconductor device having isolating oxide region - Google Patents

Fabricating method of semiconductor device having isolating oxide region

Info

Publication number
JPS5570042A
JPS5570042A JP13517979A JP13517979A JPS5570042A JP S5570042 A JPS5570042 A JP S5570042A JP 13517979 A JP13517979 A JP 13517979A JP 13517979 A JP13517979 A JP 13517979A JP S5570042 A JPS5570042 A JP S5570042A
Authority
JP
Japan
Prior art keywords
region
isolating
oxide
isolating oxide
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13517979A
Other languages
Japanese (ja)
Inventor
Akio Hayasaka
Hideo Noda
Michio Suzuki
Hiroyuki Kondo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13517979A priority Critical patent/JPS5570042A/en
Publication of JPS5570042A publication Critical patent/JPS5570042A/en
Pending legal-status Critical Current

Links

Landscapes

  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE: To prevent a base electrode from occurrence of leaked channel there under in a semiconductor device by diffusing gallium from the surface of an isolating oxide layer to thereby terminate the pn-junction of an oxide isolating (LOCOS) element under the isolating oxide layer.
CONSTITUTION: An n+-type buried layer is provided on a p-type silicon substrate 1 to epitaxially grow a silicon layer 3 and to coat it with a mask consisting of an oxide film 4 and a silicon nitride film 5. Then, it is selectively oxidized to thereby form an isolating oxide region 7 and remove a silicon nitride film 6b on the base region so as to then diffuse boron therein. Then, gallium is diffused though thin portion of the oxide film 9 and the isolating oxide region 7 thus formed on the surface to thus form a p-type region 10 on an island region 3b. Further, an emitter region 11 and an electrode 13 are formed thereat. Thus, a collector junction is terminated under the isolating oxide region 7 separated from the base electrode 13b to thereby prevent leaked current thereat.
COPYRIGHT: (C)1980,JPO&Japio
JP13517979A 1979-10-22 1979-10-22 Fabricating method of semiconductor device having isolating oxide region Pending JPS5570042A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13517979A JPS5570042A (en) 1979-10-22 1979-10-22 Fabricating method of semiconductor device having isolating oxide region

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13517979A JPS5570042A (en) 1979-10-22 1979-10-22 Fabricating method of semiconductor device having isolating oxide region

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP1258475A Division JPS5187979A (en) 1975-01-31 1975-01-31 BUNRYOSANKABUTSURYOIKIOJUSURU HANDOTAISOCHINOSEIZOHOHO

Publications (1)

Publication Number Publication Date
JPS5570042A true JPS5570042A (en) 1980-05-27

Family

ID=15145674

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13517979A Pending JPS5570042A (en) 1979-10-22 1979-10-22 Fabricating method of semiconductor device having isolating oxide region

Country Status (1)

Country Link
JP (1) JPS5570042A (en)

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