JPS5776872A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5776872A
JPS5776872A JP55152065A JP15206580A JPS5776872A JP S5776872 A JPS5776872 A JP S5776872A JP 55152065 A JP55152065 A JP 55152065A JP 15206580 A JP15206580 A JP 15206580A JP S5776872 A JPS5776872 A JP S5776872A
Authority
JP
Japan
Prior art keywords
type
layer
iil
impurity
layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55152065A
Other languages
Japanese (ja)
Inventor
Takashi Yamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP55152065A priority Critical patent/JPS5776872A/en
Publication of JPS5776872A publication Critical patent/JPS5776872A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65Integrated injection logic

Landscapes

  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain a high performance and a high dielectric strength of an IIL by a method wherein a base of an inverse type n-p-n transistor which composes the IIL is formed by a diffusion region of an impurity which is diffused from a buried layer with a high impurity density to a surface of an epitaxial layer. CONSTITUTION:An n<+> type buried layer 3 is formed on a p<-> type Si substrate 1 by diffusing high density Sb with on oxide film 2 as a mask. Then p<+> type buried layers 5, 6 are formed by diffusing high density B with an oxide film 4 as a mask. And an n<-> type epitaxial layer 7 is formed. Then p type layers 8, 9 are formed by the diffusion of the impurity B from the p<+> type buried layer 5, 6 by annealing process. As the impurity density near the surface of the p type layers 8, 9 is low, the p type layer 8 becomes a base of an inverse type n-p-n transistor which composes an IIL and the junction of the p type layer 8 and an n<+> type collector region formed afterwards becomes n<+>-p<-> junction, so that the dielectric strength of the IIL is improved.
JP55152065A 1980-10-31 1980-10-31 Semiconductor device Pending JPS5776872A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55152065A JPS5776872A (en) 1980-10-31 1980-10-31 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55152065A JPS5776872A (en) 1980-10-31 1980-10-31 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5776872A true JPS5776872A (en) 1982-05-14

Family

ID=15532285

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55152065A Pending JPS5776872A (en) 1980-10-31 1980-10-31 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5776872A (en)

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