JPS55165669A - Bipolar-mos device - Google Patents
Bipolar-mos deviceInfo
- Publication number
- JPS55165669A JPS55165669A JP7229379A JP7229379A JPS55165669A JP S55165669 A JPS55165669 A JP S55165669A JP 7229379 A JP7229379 A JP 7229379A JP 7229379 A JP7229379 A JP 7229379A JP S55165669 A JPS55165669 A JP S55165669A
- Authority
- JP
- Japan
- Prior art keywords
- region
- type
- layer
- substrate
- linear part
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
- H10D84/401—Combinations of FETs or IGBTs with BJTs
Landscapes
- Bipolar Transistors (AREA)
- Element Separation (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To improve the characteristic of a linear part by a method wherein the epitaxial layer to be grown on the semiconductor substrate is made to have a low concn. of a same conductivity type impurity as the substrate, the linear part is made to have a self-isolation structure of the collector and a region of high concentration is formed on the substrate surface. CONSTITUTION:The p<->-type layer 12 having lower concn. of the impurity than the substrate 1 is epitaxially grown on the p<->-type Si substrate 1 through the n<+>-type embedded region 3, the whole surface of the substrate is coated with oxide film, the apertures corresponding to both ends of the region are made, the n<+>-type collector isolation region 13 that reaches the region 3 is formed by the diffusion method, and the layer 12 on the region 3 is isolated like an island. Next the n<+>- type emitter region 6 is formed in said isolated layer 12 by the diffusion method, simultaneously the same n-type impurity is diffused in other region of the layer 12 to form the n<+>-type region 8. After this, p-type impurity ions are injected into the layer 12, which is surrounded by the regions 13, to change only the region of layer 12, which surrounds the region 6, into a p<+>-type region, that is, the p<+>-type base region 14. In this way, a bipolar-MOS device with a high integration and a good characteristic of the linear part can be obtained.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7229379A JPS55165669A (en) | 1979-06-11 | 1979-06-11 | Bipolar-mos device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7229379A JPS55165669A (en) | 1979-06-11 | 1979-06-11 | Bipolar-mos device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS55165669A true JPS55165669A (en) | 1980-12-24 |
Family
ID=13485067
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7229379A Pending JPS55165669A (en) | 1979-06-11 | 1979-06-11 | Bipolar-mos device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS55165669A (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57188860A (en) * | 1981-05-18 | 1982-11-19 | Hitachi Ltd | Semiconductor device |
| JPS5864060A (en) * | 1981-10-13 | 1983-04-16 | Toshiba Corp | Manufacture of semiconductor device |
| JPS6017943A (en) * | 1983-07-08 | 1985-01-29 | Matsushita Electronics Corp | Manufacturing method of semiconductor device |
| JPS61285750A (en) * | 1985-06-12 | 1986-12-16 | Nissan Motor Co Ltd | Semiconductor device |
| JPS62104068A (en) * | 1985-10-30 | 1987-05-14 | Mitsubishi Electric Corp | Semiconductor integrated circuit device |
| US4737469A (en) * | 1984-01-19 | 1988-04-12 | Honeywell Inc. | Controlled mode field effect transistors and method therefore |
| JPH0228937A (en) * | 1988-07-19 | 1990-01-31 | Matsushita Electron Corp | Semiconductor device |
| JPH03171765A (en) * | 1989-11-30 | 1991-07-25 | Toshiba Corp | Integrated circuit device |
-
1979
- 1979-06-11 JP JP7229379A patent/JPS55165669A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57188860A (en) * | 1981-05-18 | 1982-11-19 | Hitachi Ltd | Semiconductor device |
| JPS5864060A (en) * | 1981-10-13 | 1983-04-16 | Toshiba Corp | Manufacture of semiconductor device |
| JPS6017943A (en) * | 1983-07-08 | 1985-01-29 | Matsushita Electronics Corp | Manufacturing method of semiconductor device |
| US4737469A (en) * | 1984-01-19 | 1988-04-12 | Honeywell Inc. | Controlled mode field effect transistors and method therefore |
| JPS61285750A (en) * | 1985-06-12 | 1986-12-16 | Nissan Motor Co Ltd | Semiconductor device |
| JPS62104068A (en) * | 1985-10-30 | 1987-05-14 | Mitsubishi Electric Corp | Semiconductor integrated circuit device |
| JPH0228937A (en) * | 1988-07-19 | 1990-01-31 | Matsushita Electron Corp | Semiconductor device |
| JPH03171765A (en) * | 1989-11-30 | 1991-07-25 | Toshiba Corp | Integrated circuit device |
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