JPS5573991A - Integrated circuit - Google Patents

Integrated circuit

Info

Publication number
JPS5573991A
JPS5573991A JP14618278A JP14618278A JPS5573991A JP S5573991 A JPS5573991 A JP S5573991A JP 14618278 A JP14618278 A JP 14618278A JP 14618278 A JP14618278 A JP 14618278A JP S5573991 A JPS5573991 A JP S5573991A
Authority
JP
Japan
Prior art keywords
write
rom
current
executed
memory cells
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14618278A
Other languages
English (en)
Other versions
JPS6138558B2 (ja
Inventor
Hajime Masuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP14618278A priority Critical patent/JPS5573991A/ja
Publication of JPS5573991A publication Critical patent/JPS5573991A/ja
Publication of JPS6138558B2 publication Critical patent/JPS6138558B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links

Landscapes

  • Read Only Memory (AREA)
JP14618278A 1978-11-27 1978-11-27 Integrated circuit Granted JPS5573991A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14618278A JPS5573991A (en) 1978-11-27 1978-11-27 Integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14618278A JPS5573991A (en) 1978-11-27 1978-11-27 Integrated circuit

Publications (2)

Publication Number Publication Date
JPS5573991A true JPS5573991A (en) 1980-06-04
JPS6138558B2 JPS6138558B2 (ja) 1986-08-29

Family

ID=15401982

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14618278A Granted JPS5573991A (en) 1978-11-27 1978-11-27 Integrated circuit

Country Status (1)

Country Link
JP (1) JPS5573991A (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5647994A (en) * 1979-09-25 1981-04-30 Nec Corp Programmable monolithic integrated circuit
JPS6070597A (ja) * 1983-09-28 1985-04-22 Toshiba Corp 不揮発性半導体記憶装置
JPH01146198A (ja) * 1987-12-02 1989-06-08 Fujitsu Ltd プログラマブル・リード・オンリ・メモリ装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5647994A (en) * 1979-09-25 1981-04-30 Nec Corp Programmable monolithic integrated circuit
JPS6070597A (ja) * 1983-09-28 1985-04-22 Toshiba Corp 不揮発性半導体記憶装置
JPH01146198A (ja) * 1987-12-02 1989-06-08 Fujitsu Ltd プログラマブル・リード・オンリ・メモリ装置

Also Published As

Publication number Publication date
JPS6138558B2 (ja) 1986-08-29

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