JPS5591166A - Semiconductor memory - Google Patents
Semiconductor memoryInfo
- Publication number
- JPS5591166A JPS5591166A JP16336478A JP16336478A JPS5591166A JP S5591166 A JPS5591166 A JP S5591166A JP 16336478 A JP16336478 A JP 16336478A JP 16336478 A JP16336478 A JP 16336478A JP S5591166 A JPS5591166 A JP S5591166A
- Authority
- JP
- Japan
- Prior art keywords
- type
- layer
- electrode
- drain
- capacity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/202—FETs having static field-induced regions, e.g. static-induction transistors [SIT] or permeable base transistors [PBT]
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Junction Field-Effect Transistors (AREA)
- Semiconductor Memories (AREA)
Abstract
PURPOSE:To improve simultaneously both the increase in storage capacity of and the integration degree of a semiconductor memory by forming one electrode of a capacity disposed at a drain region of a conductive layer having wire area introduced from the drain region. CONSTITUTION:An n<->-type epitaxial layer 16 is laminated through an n<+>-type buried source layer 14 on a p<->-type silicon substrate 12 to thereby form a p<+>-type gate layer 18A selectively. An n<+>-type drain layer 20 is then formed on the n<->-type channel region 16A interposed between the layers 18A. After the layer 20 portion is removed and selectively coated with a SiO2 film 22, a polycrystalline silicon is accumulated on the film 22 and photoetched to thereby form a drain electrode 24 thereon. In this step the polycrystalline silicon is conducted, and diffused through the electrode 24 to thereby form the n<+>-type drain layer 20. A word line aluminum electrode 28 is then formed through a Si3N4 film 26 on the electrode 24. According to this configuration an information storage capacity C is connected to the SIT drain electrode 24 and yet increased regardless of the sectional area of the channel. Thus, even if the cell size is reduced to thereby increase the integration degree, it can prevent the capacity from decreasing.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16336478A JPS5591166A (en) | 1978-12-28 | 1978-12-28 | Semiconductor memory |
| DE19792952513 DE2952513A1 (en) | 1978-12-28 | 1979-12-28 | Semiconductor memory - consisting of static induction transistor and superimposed capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16336478A JPS5591166A (en) | 1978-12-28 | 1978-12-28 | Semiconductor memory |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5591166A true JPS5591166A (en) | 1980-07-10 |
Family
ID=15772468
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16336478A Pending JPS5591166A (en) | 1978-12-28 | 1978-12-28 | Semiconductor memory |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPS5591166A (en) |
| DE (1) | DE2952513A1 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE69416619T2 (en) * | 1993-05-12 | 1999-09-30 | Zaidan Hojin Handotai Kenkyu Shinkokai, Sendai | Semiconductor memory device and manufacturing method |
| DE4331391A1 (en) * | 1993-09-15 | 1995-03-16 | Josef Dr Kemmer | Semiconductor (detector) structure |
-
1978
- 1978-12-28 JP JP16336478A patent/JPS5591166A/en active Pending
-
1979
- 1979-12-28 DE DE19792952513 patent/DE2952513A1/en not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| DE2952513A1 (en) | 1980-07-17 |
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