JPS56167331A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS56167331A
JPS56167331A JP7101580A JP7101580A JPS56167331A JP S56167331 A JPS56167331 A JP S56167331A JP 7101580 A JP7101580 A JP 7101580A JP 7101580 A JP7101580 A JP 7101580A JP S56167331 A JPS56167331 A JP S56167331A
Authority
JP
Japan
Prior art keywords
layer
electrode wiring
platinum
hole
entire surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7101580A
Other languages
Japanese (ja)
Other versions
JPH0249011B2 (en
Inventor
Goro Miyake
Takashi Shimada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP7101580A priority Critical patent/JPS56167331A/en
Publication of JPS56167331A publication Critical patent/JPS56167331A/en
Publication of JPH0249011B2 publication Critical patent/JPH0249011B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)

Abstract

PURPOSE: To make it possible to reduce in size of electrode wiring with facility, by forming a platinum silicide layer, in advance, on a contact hole provided in an insulation layer, and then, by executing dry etching process of the electrode wiring.
CONSTITUTION: In such a process as to form an electrode wiring by opening a hole 3 on an insulation layer 2 provided on an Si substrate 1, a thin platinum layer 5 (approx. 200W300Å) is formed on the entire surface including the hole 3. This is then heat-treated so that of the platinum layer 5 the portion which contacts the substrate 1 is turned into a platinum silicide layer 6, and after other platinum layer 5 was removed, the entire surface is covered with such a layer as an aluminum layer 4'. And then, a required electrode wiring 4 is formed by executing CCl type plasma etching, etc. As the silicide layer becomes able to function as an etching mask by doing so, it becomes possible to set width of the electrode wiring 4 to equal to or less than width of the hole 3, and therefore, it becomes possible to reduce in size and increase in density. Further, it is possible to apply this process to a contact between a poly Si layer and a metallic electrode wiring.
COPYRIGHT: (C)1981,JPO&Japio
JP7101580A 1980-05-28 1980-05-28 Manufacture of semiconductor device Granted JPS56167331A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7101580A JPS56167331A (en) 1980-05-28 1980-05-28 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7101580A JPS56167331A (en) 1980-05-28 1980-05-28 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS56167331A true JPS56167331A (en) 1981-12-23
JPH0249011B2 JPH0249011B2 (en) 1990-10-26

Family

ID=13448252

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7101580A Granted JPS56167331A (en) 1980-05-28 1980-05-28 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS56167331A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59148340A (en) * 1983-02-14 1984-08-25 Fujitsu Ltd Semiconductor device and manufacture thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5478659A (en) * 1977-12-05 1979-06-22 Mitsubishi Electric Corp Menufacture of semiconductor device
JPS54149465A (en) * 1978-05-16 1979-11-22 Matsushita Electric Ind Co Ltd Production of semiconductor device
JPS5570023A (en) * 1978-11-20 1980-05-27 Mitsubishi Electric Corp Formation of electrode and wiring for semiconductor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5478659A (en) * 1977-12-05 1979-06-22 Mitsubishi Electric Corp Menufacture of semiconductor device
JPS54149465A (en) * 1978-05-16 1979-11-22 Matsushita Electric Ind Co Ltd Production of semiconductor device
JPS5570023A (en) * 1978-11-20 1980-05-27 Mitsubishi Electric Corp Formation of electrode and wiring for semiconductor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59148340A (en) * 1983-02-14 1984-08-25 Fujitsu Ltd Semiconductor device and manufacture thereof

Also Published As

Publication number Publication date
JPH0249011B2 (en) 1990-10-26

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